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Entry Level Memory Design Engineer Jobs in California

Micron

New College Grad - Design Engineer

San Jose, CA · On-site

$83K - $170K/yr

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and ...

Qualcomm

Memory Control Design Engineer

San Diego, CA · On-site

$115K - $173K/yr

QCT Memory Controller Design Team is looking for ASIC Design Engineers for the next generation high speed DDR Controllers. The front end of the DDR controller interfaces to the rest of the system ...

Micron

Semiconductor Design Engineer

San Jose, CA · On-site

$142K - $170K/yr

Design and analyze digital and analog circuits used in the development of memory products ... Employer will accept a Master's degree in Electrical Engineering or related field. Position ...

Micron

Sr HBM Design Architect, PhD NCG

Folsom, CA · On-site

$97K - $205K/yr

As an HBM Memory Design Engineer in the HBM architect team you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. This includes ...

Conductor

ASIC Design Engineer

San Francisco, CA · On-site

$130 - $210/hr

We're looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer. Ideal ...

VOLT

Entry Level Mechanical Design Engineer

San Diego, CA · On-site

$30 - $32/hr

As an entry level Mechanical Design Engineer, you will: * Create and maintain the Mechanical and Systems composite product design * Can cover one or more of composite disciplines; electrical, hydro ...

Micron

Semiconductor Design Engineer

San Jose, CA · On-site

$173K - $246K/yr

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... Engineering or related field. Position requires: 1. Verilog language; 2. Digital ASIC design ...

Apple

ASIC Design Engineer

Santa Clara, CA · On-site

We are searching for a dedicated engineer to join our exciting team of problem solvers. Description ... Develop memory hierarchies for high performance parallel computer architectures. (system-on-a-chip ...

Apple

ASIC Design Engineer

Santa Clara, CA · On-site

We are searching for a dedicated engineer to join our exciting team of problem solvers. Description ... Preferred Qualifications Drive new memory system architectures from DRAM up. Explore architecture ...

Apple

ASIC Design Engineer

Santa Clara, CA · On-site

We are searching for a dedicated engineer to join our exciting team of problem solvers. Description ... Preferred Qualifications Drive new memory system architectures from DRAM up. Explore architecture ...

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Entry Level Memory Design Engineer information

What is an entry level memory design engineer?

Entry Level Memory Design Engineers are professionals who assist in designing, developing, and testing memory components such as SRAM, DRAM, and flash memory used in electronic devices. They typically work as part of a larger engineering team, focusing on circuit design, simulations, and verification tasks. These roles are ideal for recent graduates in electrical or computer engineering who are interested in semiconductor technology and low-level hardware design. Entry level engineers receive mentorship from senior engineers and gain hands-on experience with industry-standard design tools and processes.

What are the typical responsibilities of an entry level memory design engineer during a project cycle?

As an Entry Level Memory Design Engineer, you will typically be involved in tasks such as designing memory circuits, running simulations to verify circuit performance, and assisting with layout planning. You will often work closely with senior engineers to debug and optimize designs, as well as collaborate with verification and testing teams to ensure products meet specifications. Throughout a project cycle, you may also help document design processes and contribute to design reviews, gaining valuable exposure to the full life cycle of integrated circuit development.

What are the key skills and qualifications needed to thrive as an entry level memory design engineer, and why are they important?

To thrive as an Entry Level Memory Design Engineer, you need a solid background in electrical engineering or a related field, with strong knowledge of digital and analog circuit design fundamentals. Familiarity with industry-standard EDA tools like Cadence or Synopsys, as well as basic programming skills in languages such as Verilog or VHDL, is typically required. Attention to detail, problem-solving ability, and effective teamwork are crucial soft skills for this role. These skills ensure precise and innovative memory circuit designs that meet performance, power, and reliability requirements in semiconductor products.

What are the most commonly searched types of Memory Design Engineer jobs in California?

The most popular types of Memory Design Engineer jobs in California are:

What are popular job titles related to Entry Level Memory Design Engineer jobs in California?

For Entry Level Memory Design Engineer jobs in California, the most frequently searched job titles are:

What job categories do people searching Entry Level Memory Design Engineer jobs in California look for?

The top searched job categories for Entry Level Memory Design Engineer jobs in California are:

What cities in California are hiring for Entry Level Memory Design Engineer jobs?

Cities in California with the most Entry Level Memory Design Engineer job openings:

Entry Level Memory Design Engineer jobs near you
Infographic showing various Entry Level Memory Design Engineer job openings in California as of August 2026, with employment types broken down into 88% Full Time, 10% Part Time, and 2% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution.

Senior Staff Engineer/Principal Memory Design Engineer (San Jose)

MediaTek

San Jose, CA • On-site

Full-time

Medical, Life, Retirement, PTO

Re-posted 10 days ago

Key responsibilities

  • Collaborate with tier-1 ASIC customers in North America to co-design embedded memory architectures and circuits.

  • Define, design, and develop high performance customized semiconductor memories including SRAM, TCAM, CPU caches, and CIM macros.

  • Design dual rail custom memories from start to finish to meet customer PPA specifications.

Job description

Senior Staff Engineer/Principal Memory Design EngineerSenior Staff Engineer/Principal Memory Design Engineer

3 weeks ago Be among the first 25 applicants

Get AI-powered advice on this job and more exclusive features.

MediaTek’s advanced Memory Design team in San Jose is looking for a senior memory design engineer to define and architect memory circuits for high performance compute ASICs targeting Cloud AI, Data Center Networking, Automotive and other Enterprise ASIC applications as well as edge AI Machine Learning (ML) Accelerator SoCs

Responsibilities

  • Primary job responsibilities include close collaboration with tier-1 ASIC customers in North America to co-design embedded memory architectures and circuits in advanced nodes
  • Collaborate closely with product and architecture teams to define, design, and develop high performance customized semiconductor memories including SRAM, TCAM, CPU caches and Compute-In-Memory (CIM) macros with varied PPA requirements spanning across Cloud AI, Networking, Automotive and edge AI applications
  • Design dual rail custom memories from start to finish to meet customer PPA spec
  • Innovate, design, and incorporate special circuits and features to achieve best-in-class PPA for custom and compiler memories
  • Mentor, guide, and direct other designers, while being hands-on in digital circuit design, especially targeting memories
  • Highly organized and independent design engineer who can multi-task and closely collaborate with worldwide design and CAD teams

Qualifications

  • 12+ years of hands-on experience in design of embedded memories (SRAM, TCAM) for high performance processors or ASICs in advanced nodes (3nm/5nm)
  • Strong track record of offering innovative solutions (papers, patents), good understanding of technology roadmap and market for embedded memories
  • Strong understanding of Digital Circuit design techniques in FinFET technologies
  • Exposure to complete design cycle of SRAM memory and compiler development
  • Supervise layout engineers and review layout for optimality
  • Have the ability to come up with comprehensive design verification plans, silicon bring-up plans for high-performance embedded memories
  • Experience with LEC tools (ESPCV)
  • Ability to review and coordinate layout activities
  • Silicon debug and bring up experience is required
  • Working knowledge of scripting in Perl/Python
  • Willingness to collaborate closely with cross functional teams across the globe

Salary range: $180,000 - $260,000

Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Paid time off (PTO), Parental leave, 401K and more.

MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.

Seniority level
  • Seniority levelMid-Senior level
Employment type
  • Employment typeFull-time
Job function
  • IndustriesSemiconductor Manufacturing

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