Senior Staff Engineer/Principal Memory Design EngineerSenior Staff Engineer/Principal Memory Design Engineer 3 weeks ago Be among the first 25 applicants Get AI-powered advice on this job and more ...
Senior Staff Engineer/Principal Memory Design EngineerSenior Staff Engineer/Principal Memory Design Engineer 3 weeks ago Be among the first 25 applicants Get AI-powered advice on this job and more ...
Principal Memory Design Engineer, Pathfinding
Folsom, CA · On-site
$140K - $298K/yr
As a Memory Design Engineer in Micron's Pathfinding Design Team, you will play a key role in crafting next-generation memory technologies. This position involves contributing to defining, developing ...
Principal Memory Design Engineer, Pathfinding
Folsom, CA · On-site
$140K - $298K/yr
As a Memory Design Engineer in Micron's Pathfinding Design Team, you will play a key role in crafting next-generation memory technologies. This position involves contributing to defining, developing ...
Principal Memory Design Engineer, Pathfinding
Folsom, CA · On-site
$140K - $298K/yr
As a Memory Design Engineer in Micron's Pathfinding Design Team, you will play a key role in crafting next-generation memory technologies. This position involves contributing to defining, developing ...
Principal Memory Design Engineer, Pathfinding
Folsom, CA · On-site
$140K - $298K/yr
As a Memory Design Engineer in Micron's Pathfinding Design Team, you will play a key role in crafting next-generation memory technologies. This position involves contributing to defining, developing ...
Principal Memory Design Engineer, Pathfinding
San Jose, CA · On-site
$140K - $298K/yr
As a Memory Design Engineer in Micron's Pathfinding Design Team, you will play a key role in crafting next-generation memory technologies. This position involves contributing to defining, developing ...
Principal Memory Design Engineer, Pathfinding
San Jose, CA · On-site
$140K - $298K/yr
As a Memory Design Engineer in Micron's Pathfinding Design Team, you will play a key role in crafting next-generation memory technologies. This position involves contributing to defining, developing ...
Staff Memory Circuit Design Engineer
$108K - $172K/yr
Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the ...
Staff Memory Circuit Design Engineer
$108K - $172K/yr
Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the ...
Staff Memory Circuit Design Engineer
Irvine, CA · On-site
$108K - $172K/yr
Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the ...
Staff Memory Circuit Design Engineer
Irvine, CA · On-site
$108K - $172K/yr
Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the ...
Memory Component Engineer
Santa Clara, CA · On-site
Partner with Design, NPI, Quality, and Supply Chain teams to support product development and ... Engineer , with strong focus on memory components . * Hands-on experience with JEDEC standards ...
Memory Component Engineer
Santa Clara, CA · On-site
Partner with Design, NPI, Quality, and Supply Chain teams to support product development and ... Engineer , with strong focus on memory components . * Hands-on experience with JEDEC standards ...
MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design * 5+ years of experience in circuit design in advanced CMOS processes (PhD experience may be ...
MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design * 5+ years of experience in circuit design in advanced CMOS processes (PhD experience may be ...
MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design * 5+ years of experience in circuit design in advanced CMOS processes (PhD experience may be ...
MS or PhD in Electrical Engineering with emphasis on CMOS memory, digital or mixed-signal design * 5+ years of experience in circuit design in advanced CMOS processes (PhD experience may be ...
Analog/Mixed-Signal IC Design Engineer
San Jose, CA · On-site
$234K/yr
The Analog/Mixed-Signal IC Design Engineer is responsible for the entire design process, from ... Hands-on experience in data converter (ADC/DAC) design and techniques Hands-on experience in memory ...
Analog/Mixed-Signal IC Design Engineer
San Jose, CA · On-site
$234K/yr
The Analog/Mixed-Signal IC Design Engineer is responsible for the entire design process, from ... Hands-on experience in data converter (ADC/DAC) design and techniques Hands-on experience in memory ...
2026 Intern, Memory and Personalization (Fall)
$17.75 - $23.50/hr
As an intern you will work closely with our team of engineers to develop and maintain software ... Design and prototype hybrid memory retrieval systems combining vector search and structured ...
2026 Intern, Memory and Personalization (Fall)
$17.75 - $23.50/hr
As an intern you will work closely with our team of engineers to develop and maintain software ... Design and prototype hybrid memory retrieval systems combining vector search and structured ...
2026 Intern, Memory and Personalization (Fall)
Mountain View, CA · On-site
$44 - $63/hr
Design and prototype hybrid memory retrieval systems combining vector search and structured ... ML engineering experience with building end-to-end systems in production * Strong hands-on ...
2026 Intern, Memory and Personalization (Fall)
Mountain View, CA · On-site
$44 - $63/hr
Design and prototype hybrid memory retrieval systems combining vector search and structured ... ML engineering experience with building end-to-end systems in production * Strong hands-on ...
Non-Volatile Memory Design Architecture Lead
San Jose, CA · On-site
$184K - $322K/yr
As a Design Architecture Lead in Non-Volatile-Engineering NAND Flash design team at Micron ... Innovate and architect innovative memory/storage solution for high performance and energy efficient ...
Non-Volatile Memory Design Architecture Lead
San Jose, CA · On-site
$184K - $322K/yr
As a Design Architecture Lead in Non-Volatile-Engineering NAND Flash design team at Micron ... Innovate and architect innovative memory/storage solution for high performance and energy efficient ...
Non-Volatile Memory Design Architecture Lead
San Jose, CA · On-site
$184K - $322K/yr
As a Design Architecture Lead in Non-Volatile-Engineering NAND Flash design team at Micron ... Innovate and architect innovative memory/storage solution for high performance and energy efficient ...
Non-Volatile Memory Design Architecture Lead
San Jose, CA · On-site
$184K - $322K/yr
As a Design Architecture Lead in Non-Volatile-Engineering NAND Flash design team at Micron ... Innovate and architect innovative memory/storage solution for high performance and energy efficient ...
Memory Layout Engineer
Irvine, CA · On-site
Memory Layout Engineer Job Location: Irvine/San Jose (CA), Minneapolis (MN), Phoenix/Chandler (AZ ... Design and implement custom memory layouts for advanced technology nodes, collaborating with ...
Quick apply
Memory Layout Engineer
Irvine, CA · On-site
Memory Layout Engineer Job Location: Irvine/San Jose (CA), Minneapolis (MN), Phoenix/Chandler (AZ ... Design and implement custom memory layouts for advanced technology nodes, collaborating with ...
Senior Memory System Engineer
Santa Clara, CA · On-site
$122K - $167K/yr
Experience in the design, bring-up and validation for memory failure analysis * Experience with ... class engineering teams are rapidly growing. If you're creative and autonomous, we want to hear ...
Senior Memory System Engineer
Santa Clara, CA · On-site
$122K - $167K/yr
Experience in the design, bring-up and validation for memory failure analysis * Experience with ... class engineering teams are rapidly growing. If you're creative and autonomous, we want to hear ...
Design Engineer
San Jose, CA · On-site
Drive OVM/UVM design verification and support FPGA engineers for early prototyping. * Execute RTL ... memory.
Quick apply
Design Engineer
San Jose, CA · On-site
Drive OVM/UVM design verification and support FPGA engineers for early prototyping. * Execute RTL ... memory.
Senior Memory System Engineer
Santa Clara, CA · Hybrid
$122K - $167K/yr
Experience in the design, bring-up and validation for memory failure analysis * Experience with ... class engineering teams are rapidly growing. If you're creative and autonomous, we want to hear ...
Senior Memory System Engineer
Santa Clara, CA · Hybrid
$122K - $167K/yr
Experience in the design, bring-up and validation for memory failure analysis * Experience with ... class engineering teams are rapidly growing. If you're creative and autonomous, we want to hear ...
A leading semiconductor company is hiring a Senior RTL Design Engineer to develop memory subsystems in high-performance AI accelerators. The role requires expertise in SystemVerilog, HBM/LPDDR/DDR ...
A leading semiconductor company is hiring a Senior RTL Design Engineer to develop memory subsystems in high-performance AI accelerators. The role requires expertise in SystemVerilog, HBM/LPDDR/DDR ...
Analog Design Engineer
Rancho Cordova, CA · On-site
$121K - $194K/yr
Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to ... Design and development of analog and mixed-signal circuits for 3D NAND Flash memory , supporting ...
Analog Design Engineer
Rancho Cordova, CA · On-site
$121K - $194K/yr
Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to ... Design and development of analog and mixed-signal circuits for 3D NAND Flash memory , supporting ...
Intern Memory Design Engineer information
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What does an Intern Memory Design Engineer do?
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Full-time
Medical, Life, Retirement, PTO
Posted 26 days ago
Job description
3 weeks ago Be among the first 25 applicants
Get AI-powered advice on this job and more exclusive features.
MediaTek’s advanced Memory Design team in San Jose is looking for a senior memory design engineer to define and architect memory circuits for high performance compute ASICs targeting Cloud AI, Data Center Networking, Automotive and other Enterprise ASIC applications as well as edge AI Machine Learning (ML) Accelerator SoCs
Responsibilities
- Primary job responsibilities include close collaboration with tier-1 ASIC customers in North America to co-design embedded memory architectures and circuits in advanced nodes
- Collaborate closely with product and architecture teams to define, design, and develop high performance customized semiconductor memories including SRAM, TCAM, CPU caches and Compute-In-Memory (CIM) macros with varied PPA requirements spanning across Cloud AI, Networking, Automotive and edge AI applications
- Design dual rail custom memories from start to finish to meet customer PPA spec
- Innovate, design, and incorporate special circuits and features to achieve best-in-class PPA for custom and compiler memories
- Mentor, guide, and direct other designers, while being hands-on in digital circuit design, especially targeting memories
- Highly organized and independent design engineer who can multi-task and closely collaborate with worldwide design and CAD teams
Qualifications
- 12+ years of hands-on experience in design of embedded memories (SRAM, TCAM) for high performance processors or ASICs in advanced nodes (3nm/5nm)
- Strong track record of offering innovative solutions (papers, patents), good understanding of technology roadmap and market for embedded memories
- Strong understanding of Digital Circuit design techniques in FinFET technologies
- Exposure to complete design cycle of SRAM memory and compiler development
- Supervise layout engineers and review layout for optimality
- Have the ability to come up with comprehensive design verification plans, silicon bring-up plans for high-performance embedded memories
- Experience with LEC tools (ESPCV)
- Ability to review and coordinate layout activities
- Silicon debug and bring up experience is required
- Working knowledge of scripting in Perl/Python
- Willingness to collaborate closely with cross functional teams across the globe
Salary range: $180,000 - $260,000
Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Paid time off (PTO), Parental leave, 401K and more.
MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.
Seniority level- Seniority levelMid-Senior level
- Employment typeFull-time
- IndustriesSemiconductor Manufacturing
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