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Intern Memory Design Engineer Jobs in California

Broadcom

Staff Memory Circuit Design Engineer

Irvine, CA

$108K - $172K/yr

Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the ...

Micron

New College Grad - EDA/CAD Engineer

San Jose, CA

$64K - $159K/yr

The Memory CAD Engineering organization plays a critical role in enabling Micron's custom memory design teams through advanced design automation, workflow innovation, and engineering productivity ...

Micron

New College Grad - EDA/CAD Engineer

San Jose, CA

$64K - $159K/yr

The Memory CAD Engineering organization plays a critical role in enabling Micron's custom memory design teams through advanced design automation, workflow innovation, and engineering productivity ...

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Intern Memory Design Engineer information

What does an intern memory design engineer do?

An Intern Memory Design Engineer assists in the design, development, and testing of computer memory components such as DRAM, SRAM, or Flash memory. They work closely with senior engineers to create circuit schematics, run simulations, analyze data, and help optimize memory performance. Interns may also participate in debugging and validation of memory products, learning industry-standard design tools and methodologies. This role provides valuable hands-on experience in semiconductor design and the opportunity to contribute to real-world projects.

What are the key skills and qualifications needed to thrive as an intern memory design engineer, and why are they important?

To thrive as an Intern Memory Design Engineer, you need a solid background in electrical engineering, digital/analog circuit design, and semiconductor fundamentals, often supported by ongoing or completed coursework toward a relevant degree. Familiarity with EDA tools such as Cadence, Synopsys, or Mentor Graphics, and basic knowledge of scripting languages like Python or TCL, are typically required. Strong analytical thinking, attention to detail, and effective communication set standout interns apart in collaborative engineering environments. These skills and qualities are crucial for designing reliable memory components and contributing efficiently to complex, team-driven projects.

What are some common challenges faced by an intern memory design engineer during their internship?

As an Intern Memory Design Engineer, you may encounter challenges such as understanding complex circuit design concepts and adapting to industry-standard Electronic Design Automation (EDA) tools. Working in this role often involves collaborating closely with experienced engineers and cross-functional teams to verify and optimize memory layouts for performance and reliability. Navigating the steep learning curve and balancing hands-on project work with ongoing training can be demanding, but these experiences are invaluable for building foundational skills and industry knowledge.

What are the most commonly searched types of Memory Design Engineer jobs in California?

The most popular types of Memory Design Engineer jobs in California are:

What are popular job titles related to Intern Memory Design Engineer jobs in California?

For Intern Memory Design Engineer jobs in California, the most frequently searched job titles are:

What job categories do people searching Intern Memory Design Engineer jobs in California look for?

The top searched job categories for Intern Memory Design Engineer jobs in California are:

What cities in California are hiring for Intern Memory Design Engineer jobs?

Cities in California with the most Intern Memory Design Engineer job openings:

Intern Memory Design Engineer jobs near you
Infographic showing various Intern Memory Design Engineer job openings in California as of August 2026, with employment types broken down into 91% Full Time, 6% Part Time, and 3% Contract. Highlights an 82% Physical, 5% Hybrid, and 13% Remote job distribution.

Senior Staff Engineer/Principal Memory Design Engineer (San Jose)

MediaTek

San Jose, CA • On-site

Full-time

Medical, Life, Retirement, PTO

Re-posted 22 days ago

Job description

Senior Staff Engineer/Principal Memory Design EngineerSenior Staff Engineer/Principal Memory Design Engineer

3 weeks ago Be among the first 25 applicants

Get AI-powered advice on this job and more exclusive features.

MediaTek’s advanced Memory Design team in San Jose is looking for a senior memory design engineer to define and architect memory circuits for high performance compute ASICs targeting Cloud AI, Data Center Networking, Automotive and other Enterprise ASIC applications as well as edge AI Machine Learning (ML) Accelerator SoCs

Responsibilities

  • Primary job responsibilities include close collaboration with tier-1 ASIC customers in North America to co-design embedded memory architectures and circuits in advanced nodes
  • Collaborate closely with product and architecture teams to define, design, and develop high performance customized semiconductor memories including SRAM, TCAM, CPU caches and Compute-In-Memory (CIM) macros with varied PPA requirements spanning across Cloud AI, Networking, Automotive and edge AI applications
  • Design dual rail custom memories from start to finish to meet customer PPA spec
  • Innovate, design, and incorporate special circuits and features to achieve best-in-class PPA for custom and compiler memories
  • Mentor, guide, and direct other designers, while being hands-on in digital circuit design, especially targeting memories
  • Highly organized and independent design engineer who can multi-task and closely collaborate with worldwide design and CAD teams

Qualifications

  • 12+ years of hands-on experience in design of embedded memories (SRAM, TCAM) for high performance processors or ASICs in advanced nodes (3nm/5nm)
  • Strong track record of offering innovative solutions (papers, patents), good understanding of technology roadmap and market for embedded memories
  • Strong understanding of Digital Circuit design techniques in FinFET technologies
  • Exposure to complete design cycle of SRAM memory and compiler development
  • Supervise layout engineers and review layout for optimality
  • Have the ability to come up with comprehensive design verification plans, silicon bring-up plans for high-performance embedded memories
  • Experience with LEC tools (ESPCV)
  • Ability to review and coordinate layout activities
  • Silicon debug and bring up experience is required
  • Working knowledge of scripting in Perl/Python
  • Willingness to collaborate closely with cross functional teams across the globe

Salary range: $180,000 - $260,000

Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Paid time off (PTO), Parental leave, 401K and more.

MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.

Seniority level
  • Seniority levelMid-Senior level
Employment type
  • Employment typeFull-time
Job function
  • IndustriesSemiconductor Manufacturing

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