1

Director Rtl Design Jobs (NOW HIRING)

ASIC RTL/SoC Design Engineer

San Jose, CA · On-site

$110K - $300K/yr

Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... direct emails, LinkedIn messages, or unsolicited submissions to employees, may not be reviewed or ...

RTL / Physical Design Engineer

San Jose, CA · On-site

$159K - $164K/yr

Collaborate closely with RTL design, DFT, and verification teams to manage frontend-to-backend ... Direct contact of employees, officers, or board members regarding employment opportunities is ...

RTL / Physical Design Engineer

San Jose, CA

$159K - $164K/yr

Collaborate closely with RTL design, DFT, and verification teams to manage frontend-to-backend ... Direct contact of employees, officers, or board members regarding employment opportunities is ...

We are seeking an accomplished Principal- or Director-level technical leader to lead a high-performance RTL Design and Design Verification organization focused on Qualcomm family of GPU development.

Work with design validation (DV) teams to create testplans to verify, and debug design RTL. * Work ... directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant ...

next page

Showing results 1-20

Director Rtl Design information

See salary details

$37K

$135.8K

$243K

How much do director rtl design jobs pay per year?

As of Jun 25, 2026, the average yearly pay for director rtl design in the United States is $135,763.00, according to ZipRecruiter salary data. Most workers in this role earn between $109,500.00 and $163,000.00 per year, depending on experience, location, and employer.
More about Director Rtl Design jobs
What cities are hiring for Director Rtl Design jobs? Cities with the most Director Rtl Design job openings:
What are the most commonly searched types of Rtl Design jobs? The most popular types of Rtl Design jobs are:
What states have the most Director Rtl Design jobs? States with the most job openings for Director Rtl Design jobs include:
What job categories do people searching Director Rtl Design jobs look for? The top searched job categories for Director Rtl Design jobs are:
Infographic showing various Director Rtl Design job openings in the United States as of June 2026, with employment types broken down into 87% Full Time, and 13% Part Time. Highlights an 90% Physical, 7% Hybrid, and 3% Remote job distribution, with an average salary of $135,763 per year, or $65.3 per hour.
Group Director, Design Engineering - Front End

Group Director, Design Engineering - Front End

Cadence Design Systems Inc.

Austin, TX • On-site

Full-time

Posted 13 days ago


Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Solutions (North America) team is looking for an experienced candidate to lead Front End Design projects. This is a challenging and rewarding opportunity is for a highly motivated engineer with a passion for innovation and a proven track record of success in the semiconductor industry.

This is a leadership role where you will be responsible for:

Technical Leadership:

Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment.

Design & Microarchitecture:

Define and develop microarchitectural features for IPs and subsystems, ensuring they meet PPA goals.

RTL Development:

Write, debug, and optimize RTL code in Verilog, SystemVerilog, or VHDL to create complex digital logic.

Verification & Signoff:

Oversee pre-silicon verification activities, including Lint, Clock Domain Crossing (CDC), Formal Verification (FV), and other quality checks.

Collaboration:

Work closely with cross-functional teams, including Design Verification (DV), Physical Design (PD), Architecture, and firmware engineers, to ensure successful delivery.

Qualifications:

*10+ years of Front End design and/or verification with a BS/MS Engineering or Computer Sciences

*Proven experience in leading and managing complex engineering projects

*Rich experience in IP creation and/or SoC and IP (CPU, Memory, Interface) integration

*Expert in RTL design (Verilog), simulators debuggers

*Hands on Experience in Synthesis, SDC creation and support PD and STA teams.

*Experience in driving results in multi-disciplinary organization

Desirable:

A Self-motivated person with good communication and design management skills

Experience with Cadence front end toolset

We're doing work that matters. Help us solve what others can't.