ZipRecruiter

Log In

1

Convergence Engineer Jobs (NOW HIRING)

Nvidia

Senior ASIC Timing Engineer

Durham, NC · Hybrid

Leverage your expertise to improve timing convergence flows in collaboration with methodology teams. What we need to see: * BS (or equivalent experience) in Electrical or Computer Engineering with 5 ...

Nvidia

Senior ASIC Timing Engineer

Austin, TX · Hybrid

Leverage your expertise to improve timing convergence flows in collaboration with methodology teams. What we need to see: * BS (or equivalent experience) in Electrical or Computer Engineering with 5 ...

Nvidia

Senior ASIC Timing Engineer

Hillsboro, OR · Hybrid

Leverage your expertise to improve timing convergence flows in collaboration with methodology teams. What we need to see: * BS (or equivalent experience) in Electrical or Computer Engineering with 5 ...

Nvidia

Senior ASIC Timing Engineer

Santa Clara, CA · Hybrid

Leverage your expertise to improve timing convergence flows in collaboration with methodology teams. What we need to see: * BS (or equivalent experience) in Electrical or Computer Engineering with 5 ...

Nvidia

Senior Custom Circuits Timing Engineer

Santa Clara, CA · Hybrid

$122K - $168K/yr

Apply knowledge and experience to standardize and improve timing convergence flows working with ... Work with circuit designers, tool developers, and methodology teams to validate transistor level ...

next page

Showing results 1-20

All JobsConvergence Engineer Jobs

Convergence Engineer information

See salary details

$31K

$95.8K

$127.5K

How much do convergence engineer jobs pay per year?

As of Jul 24, 2026, the average yearly pay for convergence engineer in the United States is $95,796.00, according to ZipRecruiter salary data. Most workers in this role earn between $81,000.00 and $116,000.00 per year, depending on experience, location, and employer.

What is the difference between Convergence Engineer vs RF Engineer?

AspectConvergence EngineerRF Engineer
CredentialsBachelor's in Electrical Engineering or related; certifications like Cisco or RF-specific certificationsBachelor's in Electrical Engineering, Electronics, or Communications; RF certifications
Work EnvironmentDesigning and integrating communication systems, working in labs and on-siteDesigning, testing, and optimizing radio frequency systems, often in labs or field environments
Industry UsageTelecommunications, networking, wireless communicationWireless communication, telecommunications, defense
Common Search/ComparisonConvergence Engineer vs RF Engineer

The main difference is that a Convergence Engineer focuses on integrating multiple communication technologies and systems, while an RF Engineer specializes in radio frequency design and testing. Both roles require similar technical credentials and often work in telecommunications or wireless industries, but their core responsibilities differ in scope and focus.

What are the key skills and qualifications needed to thrive as a Convergence Engineer, and why are they important?

To thrive as a Convergence Engineer, you need a solid understanding of networking, telecommunications, and IT systems, often supported by a degree in computer science or engineering. Familiarity with VoIP, unified communications platforms, network protocols, and certifications like CCNA or CompTIA Network+ are typically required. Strong problem-solving, teamwork, and communication skills help you collaborate across departments and resolve complex integration issues. These competencies are crucial for ensuring seamless connectivity and optimal performance in converged technology environments.

What is a Convergence Engineer?

A Convergence Engineer is a professional who integrates different communication systems—such as voice, data, and video—onto a unified network infrastructure. They are responsible for designing, implementing, and maintaining networks that support multiple forms of communication, ensuring seamless interoperability and security. Convergence Engineers often work with technologies like VoIP, unified communications, and cloud-based platforms, enabling businesses to streamline operations and improve collaboration. Their expertise is crucial in environments where efficient, reliable, and integrated communications are essential.

How does a Convergence Engineer typically collaborate with cross-functional teams during large-scale integration projects?

Convergence Engineers often work closely with teams from IT, network operations, software development, and project management to ensure seamless integration of diverse technologies. They facilitate communication between departments, clarify technical requirements, and help troubleshoot compatibility issues as systems converge. Regular meetings, documentation updates, and collaborative problem-solving sessions are common, allowing the Convergence Engineer to play a key role in aligning project goals and timelines across teams. This collaborative environment is both rewarding and fast-paced, offering opportunities to develop strong teamwork and communication skills.
More about Convergence Engineer jobs
What job categories do people searching Convergence Engineer jobs look for? The top searched job categories for Convergence Engineer jobs are:
Convergence Engineer jobs near you
Infographic showing various Convergence Engineer job openings in the United States as of July 2026, with employment types broken down into 6% As Needed, 64% Full Time, 29% Part Time, and 1% Contract. Highlights an 57% Physical, 3% Hybrid, and 40% Remote job distribution, with an average salary of $95,796 per year, or $46.1 per hour.
Sr. Staff Engineer, Timing Methodology & Signoff

Sr. Staff Engineer, Timing Methodology & Signoff

Ambiq Micro, Inc.

Austin, TX • On-site

$103K - $142K/yr

Other

Posted 13 days ago

Job description

Build the silicon that powers the future of ultra-low-power computing

At Ambiq, we're redefining what's possible at the edge-powering next-generation AI, wearables, and IoT devices with breakthrough ultra-low-power technology. We're looking for a Sr. Staff Engineer - Timing Methodology to take a true ownership role in driving timing from architecture to silicon-and ensuring our designs don't just work, but excel in real-world conditions.

Why this role stands out

This isn't a "maintain the flow" role. You'll:

  • Own end-to-end timing convergence (block SoC post-silicon)
  • Shape methodology, flows, and signoff strategy
  • Work on cutting-edge FinFET, multi-patterning nodes, and unique ultra-low-power challenges
  • Directly influence PPA and product success

If you thrive on solving complex timing problems others shy away from-this is your playground.

What You'll Do
  • Own timing convergence end-to-end, from methodology definition to SoC signoff
  • Develop and refine timing flows, constraints, and analysis methodologies
  • Drive block-level closure and SoC-level timing correlation
  • Lead signoff activities, including:
    • PVTR corner definition
    • Timing margining & ECO strategy
    • Extraction and analysis
    • Glitch/noise analysis & power/timing tradeoffs
  • Partner cross-functionally with RTL, DFT, physical design, and IP teams
  • Define and manage timing constraints across diverse IP (std cell, memory, hard IP)
  • Ensure strong pre-silicon to post-silicon correlation through close collaboration with bring-up and validation teams
  • Continuously enhance automation, scripts, and methodologies to improve efficiency and scalability
  • Stay at the forefront of STA advancements and emerging process technologies
What You Bring
  • 8+ years of experience in timing analysis and convergence
  • Deep expertise in static timing analysis (STA) using Synopsys Primetime or Cadence Tempus
  • Strong experience with block-level and SoC-level timing closure in advanced nodes
  • Solid understanding of digital design fundamentals and timing principles
  • Hands-on experience with industry-standard EDA tools (Synopsys, Cadence)
  • Proficiency in TCL, Python, or similar scripting languages
  • Strong problem-solving skills and ability to drive complex issues to closure
  • Excellent communication and collaboration skills across engineering teams

Nice to have:

  • Experience with PnR tools (Fusion Compiler, Innovus)
What Success Looks Like
  • Clean, predictable timing convergence across increasingly complex SoCs
  • Strong correlation between signoff and silicon behavior
  • Scalable methodologies that improve team velocity and design quality
  • Measurable impact on power, performance, and area (PPA)
Work Authorization

Must be currently authorized to work in the United States and have an approved immigrant petition that would support H-1B extensions beyond the six-year limit or allow priority date retention.

Why Ambiq

We're small enough that your impact is immediate-and big enough to be solving problems that rival the industry's most complex SoCs. Our ultra-low-power innovation creates entirely new timing challenges, making this an opportunity to do some of the most interesting work of your career.

Apply