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Contractual Asic Rtl Design Engineer Jobs in Massachusetts

... Design Engineer with Acacia, you will focus on the technical execution of high-performance ASIC ... Implement end-to-end RTL-to-GDSII implementation for advanced nodes (sub-7nm to 2nm) * Perform ...

ASIC Physical Design Engineer

Maynard, MA · On-site

$128.60 - $184.90/hr

... Design Engineer with Acacia, you will focus on the technical execution of high-performance ASIC ... Implement end-to-end RTL-to-GDSII implementation for advanced nodes (sub-7nm to 2nm) * Perform ...

New

... engineering problems in advanced digital IC design. As a Senior Digital ASIC Designer, you will be ... You will be responsible for implementing designs from RTL through synthesis. You will work in multi ...

As a logic design engineer, you will be involved in all phases of the design, from concept study ... You will provide high-quality RTL description, including assertions, for the design. Use formal ...

As a logic design engineer, you will be involved in all phases of the design, from concept study ... You will provide high-quality RTL description, including assertions, for the design. Use formal ...

... engineering problems in advanced digital IC design. As a Senior Digital ASIC Designer, you will be ... You will be responsible for implementing designs from RTL through synthesis. You will work in multi ...

New

... engineering problems in advanced digital IC design. As a Senior Digital ASIC Designer, you will be ... You will be responsible for implementing designs from RTL through synthesis. You will work in multi ...

... engineering problems in advanced digital IC design. As a Senior Digital ASIC Designer, you will be ... You will be responsible for implementing designs from RTL through synthesis. You will work in multi ...

Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...

Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...

As a logic design engineer, you will be involved in all phases of the design, from concept study ... You will provide high-quality RTL description, including assertions, for the design. Use formal ...

As a logic design engineer, you will be involved in all phases of the design, from concept study ... You will provide high-quality RTL description, including assertions, for the design. Use formal ...

ASIC Design Engineer

Andover, MA · On-site

$108K - $172K/yr

We are looking for an ASIC Implementation Engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power ...

Showing results 21-40

Contractual Asic Rtl Design Engineer information

What is the difference between Contractual Asic Rtl Design Engineer vs Digital IC Design Engineer?

AspectContractual Asic Rtl Design EngineerDigital IC Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentContract-based, project-specific, often in semiconductor or tech companiesFull-time or contract, working on digital integrated circuit design
Industry UsageCommon in semiconductor, electronics, and tech firms for ASIC developmentUsed across semiconductor, consumer electronics, and communication industries

Both roles require similar educational backgrounds and work in related environments, focusing on digital circuit design. The main difference is that Contractual Asic Rtl Design Engineers typically work on specific ASIC projects on a contractual basis, while Digital IC Design Engineers may have broader responsibilities in digital chip development, often in full-time roles.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Massachusetts? The most popular types of Asic Rtl Design Engineer jobs in Massachusetts are:
What are popular job titles related to Contractual Asic Rtl Design Engineer jobs in Massachusetts? For Contractual Asic Rtl Design Engineer jobs in Massachusetts, the most frequently searched job titles are:
What job categories do people searching Contractual Asic Rtl Design Engineer jobs in Massachusetts look for? The top searched job categories for Contractual Asic Rtl Design Engineer jobs in Massachusetts are:
What cities in Massachusetts are hiring for Contractual Asic Rtl Design Engineer jobs? Cities in Massachusetts with the most Contractual Asic Rtl Design Engineer job openings:

    ASIC Physical Design Engineer

    Cisco

    Maynard, MA

    $128K - $184K/yr

    Full-time

    Medical, Dental, Vision, Life, Retirement, PTO

    Re-posted 20 days ago


    Cisco Systems rating

    8.0

    Company rating: 8.0 out of 10

    Based on 42 frontline employees who took The Breakroom Quiz

    57th of 156 rated electronics manufacturers


    Job description

    The application window is expected to close on: 08/28/2026

    Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

    Meet the Team

    Acacia, part of Cisco, provides innovative silicon-based high-speed optical interconnect products to accelerate network scalability through advancements in performance, capacity, and cost. Our DSP ASICs, silicon photonic PICs, and coherent modules empower cloud and service providers to meet the fast-growing demand for data. We have assembled a team of cross-functional experts capable of solving the challenges of next-generation optical interconnects, resulting in industry-leading, award-winning products. Come join us at Cisco, named the #1 world's best workplaces, and do purposeful work that makes a global impact and gives back to a company culture that empowers an inclusive future for all.

    Your Impact

    As a Physical Design Engineer with Acacia, you will focus on the technical execution of high-performance ASIC designs. Working as an individual contributor, you will lead the RTL-to-GDSII implementation flow for advanced semiconductor nodes, ensuring that Acacia's networking platforms meet rigorous power, performance, and area (PPA) targets. You will be responsible for the successful delivery of assigned blocks from specification through to tapeout.

    • Implement end-to-end RTL-to-GDSII implementation for advanced nodes (sub-7nm to 2nm)

    • Perform hierarchical floor planning, place and route, and clock/power distribution

    • Conduct static timing analysis (STA) and drive timing closure for multi-mode/multi-corner designs

    • Lead the physical design of assigned blocks, ensuring quality and alignment to project timelines

    • Develop and maintain automated scripts to improve design flow efficiency and methodology

    • Collaborate with RTL and DFT teams to debug and resolve complex physical implementation issues

    • Implement test plans and participate in design reviews to ensure robust, high-quality work

    • Implement ECO strategies and support sign-off processes

    • Contribute to the refinement of design methodologies and best practices within the engineering team

    • Document functional specifications and track progress for assigned project landmarks

    Minimum Qualifications

    • Bachelors degree in Engineering + 5 years of related experience, or Masters degree in Engineering+ 3 years of related experience.

    • Demonstrated experience in ASIC physical design and implementation.

    • Experience working with hierarchical floor planning, clock and power distribution, global signal and I/O planning along with physical convergence, timing closure, and hierarchical design methodology.

    • Prior experience with power integrity analysis and working on designs >100M gates in advanced nodes.

    Preferred Qualifications

    • Experience with Scripting using languages such as TCL, Perl, Python, etc.

    • Place & Route experience using tools such as Cadence Innovus or Synopsys ICC2.

    • Experience with formal equivalence check, timing closure, signal integrity, EMIR, physical verification DRC/LVS

    • Synthesis experience including Synopsys DC/FC.

    • Formal Verification experience using tools such Synopsys Formality or Cadence LEC

    • Experience with Static Timing Analysis including tools such as Tempus.

    • Experience with block level EMIR closure.

    • Physical Verification experience including tools such as Synopsys ICV or Mentor Calibre.

    Why Cisco?

    At Cisco, we're revolutionizing how data and infrastructure connect and protect organizations in the AI era - and beyond. We've been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

    Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you'll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

    We are Cisco, and our power starts with you.

    Message to applicants applying to work in the U.S. and/or Canada:The starting salary range posted for this position is $128,600.00 to $184,900.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

    Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

    U.S. employees are offered benefits, subject to Cisco's plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

    U.S. employees are eligible for paid time away as described below, subject to Cisco's policies:

    • 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees

    • 1 paid day off for employee's birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco

    • Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees

    • Exempt employees participate in Cisco's flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)

    • 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours ofunused sick timecarried forwardfrom one calendar yearto the next

    • Additional paid time away may be requested to deal with critical or emergency issues for family members

    • Optional 10 paid days per full calendar year to volunteer

    For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco's policies.

    Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

    • .75% of incentive target for each 1% of revenue attainment up to 50% of quota;

    • 1.5% of incentive target for each 1% of attainment between 50% and 75%;

    • 1% of incentive target for each 1% of attainment between 75% and 100%; and

    • Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

    For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

    The applicable full salary ranges for this position, by specific state, are listed below:

    New York City Metro Area:

    $155,000.00 - $256,000.00

    Non-Metro New York state & Washington state:

    $138,100.00 - $227,900.00

    * For quota-based sales roles on Cisco's sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.

    ** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.


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    About Cisco Systems

    Sourced by ZipRecruiter

    Cisco Systems, a global tech titan based in San Jose, CA, US, operates in the information technology and services industry. Founded in 1984, the company was derived from a project between two computer scientists from Stanford University. They aimed to connect different networks of computer systems at the university, resulting in the first multi-protocol router, and subsequently, the birth of Cisco. As an industry-leading manufacturer of networking hardware and telecommunications equipment, Cisco's product and services range includes routers, switches, firewall devices, and telecommunication technology. The company's mission, "to shape the future of the Internet by creating unprecedented value and opportunity for our customers, employees, investors, and ecosystem partners," is a testament to its pursuit of technology-forward innovation and customer satisfaction.

    Industry

    Computer and computer peripheral equipment and software wholesalers

    Company size

    10,000+ Employees

    Headquarters location

    San Jose, CA, US

    Year founded

    1984

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