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Remote Asic Rtl Design Engineer Jobs in Massachusetts

YO AI Labs

Hardware Expert - Remote

Boston, MA · Remote

$50 - $100/hr

Interpret engineering drawings and create accurate 3D CAD models. * Develop complex mechanical ... RTL * 3D Mechanical Modeling * Computational Geometry Qualifications * Strong experience with CAD ...

YO AI Labs

Hardware Expert - Remote

Boston, MA · Remote

$50 - $100/hr

Interpret engineering drawings and create accurate 3D CAD models. * Develop complex mechanical ... RTL * 3D Mechanical Modeling * Computational Geometry Qualifications * Strong experience with CAD ...

Qorvo, Inc.

Staff RFIC Design Engineer

Chelmsford, MA · On-site +1

$144K - $187K/yr

Switch/LNA/RF IC Design Engineer, the design of GaAs/SOI/SiGe/CMOS based switch and LNA or RFIC ... Experience supporting remote engineering teams. * Be able to work independently, communicate well ...

YO AI Labs

Design Expert - Remote

Boston, MA · On-site +1

$30 - $70/hr

Design Expert Job Type: Contractor Location: Remote Schedule: Flexible / Self-Directed Job Overview ... engineering collaboration . * Develop tasks involving AI coding tools such as Cursor, Claude Code ...

YO AI Labs

Design Expert - Remote

Boston, MA · On-site +1

$30 - $70/hr

Design Expert Job Type: Contractor Location: Remote Schedule: Flexible / Self-Directed Job Overview ... engineering collaboration . * Develop tasks involving AI coding tools such as Cursor, Claude Code ...

YO AI Labs

Autodesk Fusion 360 Expert - Remote

Boston, MA · On-site +1

$40 - $120/hr

Remote Job Overview We are seeking experienced Autodesk Fusion 360 Specialists to contribute their ... No prior AI experience is required--your engineering and CAD expertise are what matter most. Key ...

YO AI Labs

Autodesk Fusion 360 Expert - Remote

Boston, MA · On-site +1

$40 - $120/hr

Remote Job Overview We are seeking experienced Autodesk Fusion 360 Specialists to contribute their ... No prior AI experience is required--your engineering and CAD expertise are what matter most. Key ...

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Remote Asic Rtl Design Engineer information

What is a remote ASIC RTL design engineer?

A Remote ASIC RTL Design Engineer is a professional who specializes in designing the Register Transfer Level (RTL) code for Application-Specific Integrated Circuits (ASICs) while working remotely. Their main responsibilities include creating and verifying digital circuit designs using hardware description languages such as Verilog or VHDL. These engineers collaborate with hardware teams to ensure functionality, performance, and power requirements are met, all while operating from a location outside of a traditional office setting. They often use remote collaboration tools and simulation software to review and validate designs before fabrication.

What are the key skills and qualifications needed to thrive as a remote ASIC RTL design engineer?

To thrive as a Remote ASIC RTL Design Engineer, you need a solid background in digital design, computer engineering, and hardware description languages like Verilog or VHDL, often supported by a relevant degree. Proficiency with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, as well as experience with simulation, synthesis, and version control systems, is crucial. Strong problem-solving, self-motivation, and effective remote communication skills distinguish top performers in this role. These skills ensure accurate, efficient design cycles and effective collaboration across distributed teams, leading to successful chip delivery.

What are some common challenges faced by remote ASIC RTL design engineers, and how can they be addressed?

Remote ASIC RTL Design Engineers often face challenges such as coordinating with distributed teams across different time zones and ensuring effective communication during complex design phases. To address these issues, it’s important to establish clear documentation practices, utilize collaboration tools like version control and video conferencing, and schedule regular check-ins with team members. Additionally, staying proactive in seeking feedback and clarifying design specifications helps ensure alignment and reduces misunderstandings. Building strong virtual relationships with verification and backend teams can also streamline the handoff process and overall project flow.

What is the difference between Remote Asic Rtl Design Engineer vs Remote Digital IC Design Engineer?

AspectRemote Asic Rtl Design EngineerRemote Digital IC Design Engineer
Primary FocusRegister Transfer Level (RTL) design for ASICsDigital integrated circuit design at the IC level
Skills & CertificationsHDL (Verilog/VHDL), EDA tools, verificationHDL, circuit simulation, verification, FPGA experience
Work EnvironmentASIC design teams, hardware developmentIC design teams, semiconductor industry
Industry UsageUsed in ASIC development for various applicationsUsed in digital IC manufacturing and prototyping

Both roles involve digital design and HDL skills, but the Remote Asic Rtl Design Engineer focuses on RTL coding for ASICs, while the Remote Digital IC Design Engineer covers broader digital IC design, including FPGA and chip-level work. They share similar credentials and work environments, often overlapping in semiconductor companies.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Massachusetts?

The most popular types of Asic Rtl Design Engineer jobs in Massachusetts are:

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For Remote Asic Rtl Design Engineer jobs in Massachusetts, the most frequently searched job titles are:

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The top searched job categories for Remote Asic Rtl Design Engineer jobs in Massachusetts are:

What cities in Massachusetts are hiring for Remote Asic Rtl Design Engineer jobs?

Cities in Massachusetts with the most Remote Asic Rtl Design Engineer job openings:

Remote Asic Rtl Design Engineer jobs near you

ASIC and Logic Design Engineering Manager (Compute Test, North Reading)

Teradyne

North Reading, MA • On-site, Remote

$155K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 5 days ago

Job description

We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world!

We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.

Our Purpose
TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day.
We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team - one that makes better decisions, drives innovation and delivers better business results.
Opportunity Overview
The Logic Design Manager is responsible for leading a team of developers in designing and verifying FPGA's for Teradyne Compute Test Division's next generation products. In this role you will lead a team of ~4-6 engineers in a fast-paced environment to help the organization meet key business needs. Requires close collaboration with the other FPGA design and verification managers and with other engineering disciplines including mixed signal ASIC design, circuit board design, software and systems engineering to specify and implement new products. You should have hands-on experience with complex FPGA (and preferably digital ASIC) SOC designs for real-world products. You also should have a proven track record of managing engineering teams toward timely deliverables and successful project completion.  

  • Lead multiple simultaneous (typically 2-3) FPGA or digital IP development projects. 

  • Typically includes oversight of some remote resources.  

  • Planning and tracking of project schedule and budget. 

  • Manage project staffing levels including both full time and contract resources. 

  • Represent the FPGA team on project core teams and at program reviews. 

  • Contribute to FPGA implementation (i.e. code RTL blocks) as needed. 

  • Provide technical support for HW sustaining issues. 

  • Set goals, provide coaching and manage compensation of a 4-6 person team. 

  • Contribute to FPGA team process improvement initiatives. 

  • Collaborate with other engineering and business disciplines to ensure that FPGA and IP deliverables satisfy all product requirements. 


All About You
We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. If you're ready to join us in this mission, take a closer look at the minimum criteria for the position.

  • BSEE or MSEE and 12+ years of relevant experience in Digital FPGA design and integration (Digital ASIC experience is a plus). 
  • Minimum of 5 years of experience as an FPGA/ASIC project lead, driving multiple projects from concept, architecture exploration, design implementation and lab validation to production release. 
  • Extensive experience coding RTL (verilog preferred). 
  • Extensive experience using digital simulation tools (Cadence preferred). 
  • Extensive experience using static timing analysis tools. 
  • Experience designing with the following: PCIe, DDR3/4/5, AXI, ethernet, SPI, SERDES 
  • Experience with either AMD or Altera FPGAs and development tools (Vivado/Quartus), preferably both. 
  • Experience using digital design quality tools e.g. LINT, CDC. 
  • Experience with bug tracking tools (Jira etc.) 
  • Experience with source control systems (Clearcase, Git, CVS) and continuous integration. 
  • Familiarity with digital verification tools and methodologies (preferably UVM). 
  • Experience with project scheduling tools (e.g. Microsoft project) 
  • Experience with embedded processors and digital signal processing is a plus. 
  • Experience with high level programming languages (C, C++) is a plus. 
  • Excellent presentation and communication skills. 
  • Preferred: Experience developing hardware for automated test equipment is a plus. 
  • Preferred: 2-3 years of experience as a first level manager of an engineering team. 

Compensation:
The base salary range for this role is $155,500 - $ 248,700. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.

 

Incentive Plan: This job is eligible for discretionary bonus(es) based on financial performance.  

Benefits:

Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more.  Please click here to see details.  

 

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