Focus on design and development of package and interconnect methods for Renesas's AI/Datacenter ... Knowledge of wafer level, flip-chip, multi-chip module and power devices will be a plus.
Focus on design and development of package and interconnect methods for Renesas's AI/Datacenter ... Knowledge of wafer level, flip-chip, multi-chip module and power devices will be a plus.
Focus on design and development of package and interconnect methods for Renesas's AI/Datacenter ... Knowledge of wafer level, flip-chip, multi-chip module and power devices will be a plus.
Focus on design and development of package and interconnect methods for Renesas's AI/Datacenter ... Knowledge of wafer level, flip-chip, multi-chip module and power devices will be a plus.
... chip level architecture and simulation experience. The ideal candidate will also have a solid understand of DFM and DFMEA, i.e. design risk mitigation and design yield enhancement techniques Open ...
... chip level architecture and simulation experience. The ideal candidate will also have a solid understand of DFM and DFMEA, i.e. design risk mitigation and design yield enhancement techniques Open ...
Evaluate full-chip and block-level HBM and DRAM circuit designs to ensure functional correctness ... Debug design issues, support root-cause analysis, track bugs, and drive coverage and closure.
Evaluate full-chip and block-level HBM and DRAM circuit designs to ensure functional correctness ... Debug design issues, support root-cause analysis, track bugs, and drive coverage and closure.
Senior Physical Design Engineer (remote) at Chelsea Search Group Richardson, TX
Richardson, TX ยท On-site
$120 - $160/hr
Overview Senior Physical Design Engineer (remote) contract position. Location: Richardson, TX. US ... Production-proven experience with floor planning at chip level with Bus/Pin variables, synthesis ...
Senior Physical Design Engineer (remote) at Chelsea Search Group Richardson, TX
Richardson, TX ยท On-site
$120 - $160/hr
Overview Senior Physical Design Engineer (remote) contract position. Location: Richardson, TX. US ... Production-proven experience with floor planning at chip level with Bus/Pin variables, synthesis ...
Principal Analog Design Engineer - Mixed-Signal PHY (Clocking / High-Speed I/O)
Richardson, TX ยท On-site
$183K/yr
As a Principal Analog Design Engineer, you will be at the forefront of developing custom and ... Familiarity with die-to-die or chip-to-chip PHY architectures - UCIe, AIB, BoW, or proprietary ...
Principal Analog Design Engineer - Mixed-Signal PHY (Clocking / High-Speed I/O)
Richardson, TX ยท On-site
$183K/yr
As a Principal Analog Design Engineer, you will be at the forefront of developing custom and ... Familiarity with die-to-die or chip-to-chip PHY architectures - UCIe, AIB, BoW, or proprietary ...
As a Principal Analog Design Engineer, you will be at the forefront of developing custom and ... Familiarity with die-to-die or chip-to-chip PHY architectures - UCIe, AIB, BoW, or proprietary ...
As a Principal Analog Design Engineer, you will be at the forefront of developing custom and ... Familiarity with die-to-die or chip-to-chip PHY architectures - UCIe, AIB, BoW, or proprietary ...
DFM RET Engineer
Dallas, TX ยท On-site
At 28nm and below, photolithography cannot simply print a chip design as drawn but rather optical diffraction causes critical features to print incorrectly, with direct consequences to yield and ...
DFM RET Engineer
Dallas, TX ยท On-site
At 28nm and below, photolithography cannot simply print a chip design as drawn but rather optical diffraction causes critical features to print incorrectly, with direct consequences to yield and ...
Conduct chip architecture trade-off analysis to ensure spec compliance at competitive cost * Participate in design reviews and produce thorough design and product documentation * Supervise IC layout ...
Conduct chip architecture trade-off analysis to ensure spec compliance at competitive cost * Participate in design reviews and produce thorough design and product documentation * Supervise IC layout ...
Digital IC Design Engineer
Dallas, TX ยท On-site
$123K/yr
Conduct chip architecture trade-off analysis to ensure spec compliance at competitive cost * Participate in design reviews and produce thorough design and product documentation * Supervise IC layout ...
Digital IC Design Engineer
Dallas, TX ยท On-site
$123K/yr
Conduct chip architecture trade-off analysis to ensure spec compliance at competitive cost * Participate in design reviews and produce thorough design and product documentation * Supervise IC layout ...
DFM RET Engineer
Dallas, TX ยท On-site
At 28nm and below, photolithography cannot simply print a chip design as drawn but rather optical diffraction causes critical features to print incorrectly, with direct consequences to yield and ...
DFM RET Engineer
Dallas, TX ยท On-site
At 28nm and below, photolithography cannot simply print a chip design as drawn but rather optical diffraction causes critical features to print incorrectly, with direct consequences to yield and ...
Principal HBM Design Architect
Richardson, TX ยท On-site
You will evaluate block-level and full-chip functionality, solve complex challenges in building ... Design and analyze digital, analog, and mixed-signal circuits for HBM DRAM products. * Perform ...
Principal HBM Design Architect
Richardson, TX ยท On-site
You will evaluate block-level and full-chip functionality, solve complex challenges in building ... Design and analyze digital, analog, and mixed-signal circuits for HBM DRAM products. * Perform ...
Principal Design Verification Engineer, HBM
Richardson, TX ยท On-site
$150 - $210/hr
Verify IP, subsystem, full-chip, and system-level HBM and DRAM designs to ensure functional ... Lead debug and root-cause analysis of complex design issues, drive bug resolution, and ensure ...
Principal Design Verification Engineer, HBM
Richardson, TX ยท On-site
$150 - $210/hr
Verify IP, subsystem, full-chip, and system-level HBM and DRAM designs to ensure functional ... Lead debug and root-cause analysis of complex design issues, drive bug resolution, and ensure ...
Testing or designing RF hybrid (chip and wire) technologies * High speed data converter test/characterization * High power RF design or test experience * Scripting experience (Matlab or Python)
Testing or designing RF hybrid (chip and wire) technologies * High speed data converter test/characterization * High power RF design or test experience * Scripting experience (Matlab or Python)
Principal HBM Design Architect
Richardson, TX ยท On-site
As an HBM Memory Design Engineer in Micron's HBM Architecture Team, you will design, simulate ... You will evaluate block-level and full-chip functionality, perform architectural pathfinding, and ...
Principal HBM Design Architect
Richardson, TX ยท On-site
As an HBM Memory Design Engineer in Micron's HBM Architecture Team, you will design, simulate ... You will evaluate block-level and full-chip functionality, perform architectural pathfinding, and ...
Mixed Signal Design Verification (MSDV) Engineer
Dallas, TX ยท On-site
$110 - $160/hr
Mixed Signal Design Verification Engineer****Position Summary**Integrated Circuit Solutions (ICS ... Understand power management chip architectures (ideal diodes, e-fuses, switching converters etc)
Mixed Signal Design Verification (MSDV) Engineer
Dallas, TX ยท On-site
$110 - $160/hr
Mixed Signal Design Verification Engineer****Position Summary**Integrated Circuit Solutions (ICS ... Understand power management chip architectures (ideal diodes, e-fuses, switching converters etc)
SoC Timing (Static Timing Analysis/STA) Engineer, HBM Richardson, Texas, United States of America
Richardson, TX ยท On-site
$180 - $240/hr
Drive timing closure at block, subsystem, and full-chip levels through critical path analysis, engineering change orders (ECOs), and close collaboration with physical design on placement, clock tree ...
SoC Timing (Static Timing Analysis/STA) Engineer, HBM Richardson, Texas, United States of America
Richardson, TX ยท On-site
$180 - $240/hr
Drive timing closure at block, subsystem, and full-chip levels through critical path analysis, engineering change orders (ECOs), and close collaboration with physical design on placement, clock tree ...
At 28nm and below, photolithography cannot simply print a chip design as drawn but rather optical diffraction causes critical features to print incorrectly, with direct consequences to yield and ...
At 28nm and below, photolithography cannot simply print a chip design as drawn but rather optical diffraction causes critical features to print incorrectly, with direct consequences to yield and ...
Circuit / Memory Design Engineer | HBM - TPG
Richardson, TX ยท On-site
$120 - $170/hr
We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one ... As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and ...
Circuit / Memory Design Engineer | HBM - TPG
Richardson, TX ยท On-site
$120 - $170/hr
We stack multiple DRAM chips on a high-speed memory controller with a coordinated logic chip in one ... As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and ...
Staff HBM Design Architect
Richardson, TX ยท On-site
$146K - $297K/yr
HBM Design Architect We are the HBM Architecture team at Micron, focused on pushing the limits of ... Evaluate full-chip or block-level functionality and develop solutions to ensure functional ...
Staff HBM Design Architect
Richardson, TX ยท On-site
$146K - $297K/yr
HBM Design Architect We are the HBM Architecture team at Micron, focused on pushing the limits of ... Evaluate full-chip or block-level functionality and develop solutions to ensure functional ...
Chip Design information
See Dallas, TX salary details
$41.7K - $56.1K
4% of jobs
$56.1K - $70.5K
8% of jobs
$81.1K is the 25th percentile. Wages below this are outliers.
$70.5K - $84.9K
17% of jobs
The median wage is $98.3K / yr.
$84.9K - $99.3K
22% of jobs
$99.3K - $113.7K
15% of jobs
$113.7K - $128.2K
6% of jobs
$132.8K is the 75th percentile. Wages above this are outliers.
$128.2K - $142.6K
7% of jobs
$142.6K - $157K
7% of jobs
$157K - $171.4K
8% of jobs
$171.4K - $185.8K
2% of jobs
$185.8K - $200.2K
2% of jobs
$41.7K
$113.7K
$200.2K
How much do chip design jobs pay per year?
What is a chip design?
A Chip Design job involves creating and developing semiconductor circuits used in electronic devices. Engineers in this field work on designing, verifying, and testing integrated circuits (ICs) to ensure performance, power efficiency, and reliability. They use specialized software tools for designing hardware and optimizing functionality. Chip designers collaborate with cross-functional teams to bring new processors, memory chips, or custom ASICs from concept to production. This role is crucial in industries like computing, telecommunications, and consumer electronics.
What are the key skills and qualifications needed to thrive in chip design?
To excel in Chip Design, a strong background in electrical engineering, digital and analog circuit design, and semiconductor physics is typically required, often supported by a relevant engineering degree. Familiarity with electronic design automation (EDA) tools like Cadence, Synopsys, and Mentor Graphics, as well as proficiency in hardware description languages (HDLs) such as Verilog or VHDL, are standard prerequisites. Outstanding problem-solving skills, attention to detail, and the ability to collaborate closely with cross-functional teams set candidates apart. These competencies are essential for designing efficient, reliable integrated circuits and meeting the evolving needs of the semiconductor industry.
What are the typical career progression opportunities in chip design?
Chip Design offers a clear pathway for career growth, starting from entry-level positions such as Design Engineer or Verification Engineer and progressing to roles like Lead Designer, Project Manager, or Technical Architect. As you gain experience and demonstrate expertise, opportunities often open up in specialized areas such as physical design, timing analysis, or system architecture. Many professionals also advance to leadership or managerial positions, overseeing teams or entire design projects. Additionally, working in such a fast-evolving field keeps you engaged with the latest technologies and can provide options to transition into adjacent areas like product management or application engineering.
How much do chip designers make?
How to get a job in chip design?
Is chip design a good career?
What are popular job titles related to Chip Design jobs in Dallas, TX?
For Chip Design jobs in Dallas, TX, the most frequently searched job titles are:
What job categories do people searching Chip Design jobs in Dallas, TX look for?
The top searched job categories for Chip Design jobs in Dallas, TX are:
What cities near Dallas, TX are hiring for Chip Design jobs?
Cities near Dallas, TX with the most Chip Design job openings:

Full-time
Posted 16 days ago
Job description
Company Description
Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world's leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.
Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what's next in electronics and the world.
Job Description
Responsibilities:
- Package Technology Development/NPI, R&D, Global OSAT management for new Package Development/Product qualification, Technology Roadmap definition, R&D budget management & customer adoption programs.
- Focus on design and development of package and interconnect methods for Renesas's AI/Datacenter Infrastructure Power packaging needs especially Smart Power Stages, Vertical Power Stages, Power Modules & Discrete FET packages. Scope also involves WBG (Ie. SiC & GaN) development along with DBC, AMB substrates and advanced interconnect technologies. Knowledge of wafer level, flip-chip, multi-chip module and power devices will be a plus.
- Benchmark, select and qualify suitable materials, processes and assembly subcontractors (OSAT) or contract manufacturers (CM).
- Work with OSAT/CM to develop, run DOE to optimize processes and establish process spec.
- Work with Product groups and Reliability team, qualify new packages and processes within required time frame.
- Resolve all process integration issues by ensuring all window checks are done on critical process steps.
- Establish production controls and monitors to ensure there is no room for quality incidents.
- Ensure smooth transition into production & implement ramp up monitor.
- Work with OSAT/CM to monitor and resolve process issues early in the production phase to ensure only parts with superior quality shipped to customer.
- Develop and maintain technical expertise on advances and innovations in power SiP/modules, wafer level packaging & flip chip interconnects.
- Participate in packaging roadmap development & focus on execution.
- Address internal and external customer complaints working with peers of Marketing, Product groups, Quality and Operations organization to satisfy growth in businesses.
- Establish & maintain package design rules.
Qualifications
Qualifications:
- Doctorate/Masters / Bachelor's Degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering.
- 15 to 20 years of relevant experience in package development emphasizing power SiP/module, wafer level & flip-chip packaging
- Strong understanding of power SiP/modules, wafer level/flip-chip packaging methods, assembly process knowledge, qualification methods, SPC and statistical analysis software
- Knowledge of wire-bonding & multi-chip module technologies a plus.
- Strong interpersonal and communication skills.
- Strong analytical and presentation skills.
Additional Information
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world-leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.
Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.
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