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Asic Development Engineer Jobs in Arizona (NOW HIRING)

Sr. HW Project Engineer

Phoenix, AZ ยท On-site

$98K - $128K/yr

... FPGA / ASIC design. Must have proven project engineering track record leading, coordinating and facilitating a team of technical contributors during product development execution. * Experience ...

Sr. HW Project Engineer

Phoenix, AZ ยท On-site

$98K - $128K/yr

... FPGA / ASIC design. Must have proven project engineering track record leading, coordinating and facilitating a team of technical contributors during product development execution. * Experience ...

Sr Hardware Project Engineer

Phoenix, AZ ยท On-site

$109K - $146K/yr

... ASIC design. Must have proven project engineering track record leading, coordinating and facilitating a team of technical contributors during product development execution. Candidates that do not ...

New

Sr Hardware Project Engineer

Phoenix, AZ ยท On-site

$109K - $146K/yr

... ASIC design. Must have proven project engineering track record leading, coordinating and facilitating a team of technical contributors during product development execution. Candidates that do not ...

New

Advanced IC Packaging Engineer

Chandler, AZ ยท On-site

$175K - $225K/yr

Responsible for the end-to-end development of advanced IC packaging solutions integrating power ... Partner directly with hyperscalers, ASIC, GPU, and xPU customers to integrate power delivery ...

Digital Design Engineer

Chandler, AZ ยท On-site

$133K/yr

Microarchitecture and RTL development. * Clock and reset domain crossing. * Functional verification ... Exposure to low-power and high-performance ASIC design techniques. * Experience with back-end flows ...

Design Verification Engineer

Chandler, AZ ยท On-site

$133K - $163K/yr

Support verification flow and infrastructure development, including regressions and automation ... Significant industry experience in silicon design and/or ASIC verification. * Strong proficiency ...

Senior Digital Engineer

Chandler, AZ ยท On-site

$133K/yr

Ensuring digital development process is state-of-art and achieves budget, schedule, and project ... Strong understanding of ASIC design methodology. * Strong understanding of Lint, CDC & RDC tools.

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Asic Development Engineer information

What engineer makes $500,000 a year?

An experienced ASIC Development Engineer working in high-demand sectors such as semiconductor design or advanced chip development can earn $500,000 or more annually, especially with seniority, specialized skills, and in competitive markets. Compensation often includes base salary, bonuses, and stock options, particularly in large tech or semiconductor companies.

What is the difference between Asic Development Engineer vs FPGA Design Engineer?

AspectAsic Development EngineerFPGA Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; knowledge of ASIC design toolsBachelor's or Master's in Electrical Engineering, Digital Design; familiarity with FPGA development tools
Work EnvironmentDesigning and verifying custom silicon chips in semiconductor labs or R&D centersDeveloping and testing FPGA-based solutions in hardware labs or embedded systems environments
Industry UsageUsed in semiconductor companies, integrated circuit design firms, and tech giantsCommon in telecommunications, aerospace, and embedded systems industries

While both roles involve digital hardware design, Asic Development Engineers focus on creating custom chips for high-performance applications, whereas FPGA Design Engineers work on programmable hardware solutions. Both require strong digital design skills and familiarity with hardware description languages, but their end products and development environments differ.

What engineers make $300,000 a year?

Senior engineers in high-demand fields such as software engineering, data engineering, and ASIC development can earn $300,000 or more annually, especially with extensive experience, specialized skills, and working in competitive industries or companies. Roles like senior hardware or ASIC design engineers often reach this level with advanced technical expertise and leadership responsibilities.

Are ASIC engineers in demand?

ASIC development engineers are in high demand due to the growth of industries like consumer electronics, telecommunications, and automotive systems that require custom integrated circuits. Skills in hardware description languages such as VHDL or Verilog, along with experience in FPGA prototyping and verification, enhance employability in this field.

How much do ASIC engineers make?

ASIC development engineers typically earn between $80,000 and $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills in hardware description languages and verification tools can earn higher salaries, often exceeding $150,000.
What job categories do people searching Asic Development Engineer jobs in Arizona look for? The top searched job categories for Asic Development Engineer jobs in Arizona are:
What cities in Arizona are hiring for Asic Development Engineer jobs? Cities in Arizona with the most Asic Development Engineer job openings:
Senior FPGA Design Engineer

Senior FPGA Design Engineer

COMTECH TELECOMMUNICATIONS

Chandler, AZ โ€ข On-site

$101K - $136K/yr

Full-time

Re-posted 15 days ago


Job description


Job Title: Senior FPGA Engineer III

Department: Engineering->Platforms->FPGA SoC Group

Reports To: Director, Platforms

FLSA Status: Exempt

Last Modified: 9/10/2025

Level: T3

Location Chandler, AZ โ€“ Onsite 5 Days a week

Company Overview

Comtech Telecommunications Corp. is a leading global technology company providing terrestrial and wireless network solutions, next-generation 9-1-1 emergency services, satellite and space communications technologies, and cloud-native capabilities to commercial and government customers around the world. Our unique culture of innovation and employee empowerment unleashes a relentless passion for customer success. With multiple facilities located in technology corridors throughout the United States and around the world, Comtech leverages our global presence, technology leadership, and decades of experience to create the worldโ€™s most innovative communications solutions. For more information, please visit www.comtech.com.
Weโ€™re seeking curious, growth-minded thinkers to help shape our vision, structures, and systems; playing a key role as we launch into our ambitious future. If youโ€™re invigorated by our mission, values, and drive to change the world โ€” weโ€™d love to have you apply.


Position Summary

Senior FPGA Designer with experience in the entire design flow for complex FPGAโ€™s.

Responsibilities

  • Design, develop, document, debug and test FPGA SoC systems; including:
    1. IP Integration into FPGA Projects (synthesis/implementation)
    2. High-Performance FPGA IP (VHDL/SystemVerilog)
    3. Userspace Drivers for FPGA IP (C++)
    4. Firmware for Embedded Microcontrollers (C)
  • Utilize strong communication skills to effectively work and communicate with team members and engineering management.

Qualifications

  • Strong digital design engineer with FPGA/ASIC SoC design experience
  • Strong FPGA Implementation with Altera Quartus or Xilinx Vivado
  • Experience designing/debugging SoC systems with AMBA-compliant AXI and APB interfaces
  • Experience designing fmax-optimized, high-throughput, pipelined AXI-Stream IP
  • Capable of creating RTL simulations to identify and resolve most issues before hardware tests
  • Knowledgeable in Static Timing Analysis (STA) and Synopsis Design Constraints (SDC)
  • Experience analyzing STA reports and post-synth netlist/placement to resolve failing paths
  • Experience contributing to schematic capture and layout for FPGA portions of PCB designs
  • Experience implementing at least one Gigabit Transceiver Protocol:
    1. PCI Express, Interlaken, USB SuperSpeed
    2. 1000BASE-X/SGMII, 10GBASE-R, 40GBASE-4, 100GBASE-R4
  • Experience implementing Network Protocols, such as:
    • L1: IEEE 802.3, Cisco, Q/SFP+ MSA standards for Ethernet (1G to 100G)
    • L2/L3: IPv4, IPv6, ARP, ICMP, IGMP, UDP, TCP
    • L4: VITA 49.2, IEEE-ISTO 4900 Digital IF Interoperability Standard (DIFI) and/or eCPRi
      (Highly Desired)
  • Proficient in SW development with C, C++ and GIT version control
  • Proficient in Microsoft Office Tools (Word, Excel, PowerPoint, Visio, etc.)
  • Demonstrated experience supporting multi-disciplinary, cross functional and matrixed teams

Desired Qualifications

  • Working knowledge of digital IF streams such as VITA 49.2, DIFI and/or eCPRi (Highly Desired)
  • Working knowledge of Embedded Linux: Kernel / Yocto / U-Boot / DeviceTree
  • Working knowledge with SATCOM waveforms like DVB-S2X and/or 5G NTN 3GPP Rel 17/18
  • Working knowledge of communication networks and security within a zero-trust environment
  • Experience with Partial Reconfiguration/DFX or PCIe CvP
  • Possess an active DoD clearance or demonstrate readiness to obtain one

Education

  • Bachelors in Electrical or Computer Engineering (or related degree).

Experience:

  • 5+ years of FPGA/ASIC SoC design experience.


Comtech Telecommunications Corp. is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability protected veteran status or other characteristics protected by law.