We take pride in our commitment to employee development, values-based decision making, and strong ... Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT ...
We take pride in our commitment to employee development, values-based decision making, and strong ... Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT ...
We take pride in our commitment to employee development, values-based decision making, and strong ... Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT ...
We take pride in our commitment to employee development, values-based decision making, and strong ... Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT ...
The Principal IC Design Engineer will architect innovative circuits to solve electronic system ... Support ASIC qualification, including hardware and software development, and interface with end ...
New
The Principal IC Design Engineer will architect innovative circuits to solve electronic system ... Support ASIC qualification, including hardware and software development, and interface with end ...
New
Principal IC Design Engineer
Chandler, AZ · On-site
$145K - $185K/yr
The Principal IC Design Engineer will architect innovative circuits to solve electronic system ... Support ASIC qualification, including hardware and software development, and interface with end ...
New
Principal IC Design Engineer
Chandler, AZ · On-site
$145K - $185K/yr
The Principal IC Design Engineer will architect innovative circuits to solve electronic system ... Support ASIC qualification, including hardware and software development, and interface with end ...
New
Electrical Engineers II - FPGA Design - Actively Growing Our Engineering Teams!
Phoenix, AZ · On-site
... development, we offer capabilities and opportunity no one else can. Together, we push the ... As an Electrical Engineer II you will develop FPGA designs for all major vendors and device ...
Electrical Engineers II - FPGA Design - Actively Growing Our Engineering Teams!
Phoenix, AZ · On-site
... development, we offer capabilities and opportunity no one else can. Together, we push the ... As an Electrical Engineer II you will develop FPGA designs for all major vendors and device ...
... development, we offer capabilities and opportunity no one else can. Together, we push the ... As an Electrical Engineer II you will develop FPGA designs for all major vendors and device ...
... development, we offer capabilities and opportunity no one else can. Together, we push the ... As an Electrical Engineer II you will develop FPGA designs for all major vendors and device ...
Senior FPGA Design Engineer
Chandler, AZ · On-site
$101K - $136K/yr
Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation ... Proficient in SW development with C, C++ and GIT version control * Proficient in Microsoft Office ...
Quick apply
Senior FPGA Design Engineer
Chandler, AZ · On-site
$101K - $136K/yr
Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation ... Proficient in SW development with C, C++ and GIT version control * Proficient in Microsoft Office ...
... development, we offer capabilities and opportunity no one else can. Together, we push the ... As an Electrical Engineer II you will develop FPGA designs for all major vendors and device ...
... development, we offer capabilities and opportunity no one else can. Together, we push the ... As an Electrical Engineer II you will develop FPGA designs for all major vendors and device ...
... development, we offer capabilities and opportunity no one else can. Together, we push the ... As an Electrical Engineer II you will develop FPGA designs for all major vendors and device ...
... development, we offer capabilities and opportunity no one else can. Together, we push the ... As an Electrical Engineer II you will develop FPGA designs for all major vendors and device ...
Digital Design Verification Engineer (AZ)
Tucson, AZ · On-site
$128K - $156K/yr
Test case development will include the use of directed random test generators, device driver and ... Responsible for all test software required to verify a SOC ASIC. * May include integrating new ...
Digital Design Verification Engineer (AZ)
Tucson, AZ · On-site
$128K - $156K/yr
Test case development will include the use of directed random test generators, device driver and ... Responsible for all test software required to verify a SOC ASIC. * May include integrating new ...
Electrical Engineers II - FPGA Design - Actively Growing Our Eng with Security Clearance
Tucson, AZ · On-site
... development, we offer capabilities and opportunity no one else can. Together, we push the ... As an Electrical Engineer II you will develop FPGA designs for all major vendors and device ...
Electrical Engineers II - FPGA Design - Actively Growing Our Eng with Security Clearance
Tucson, AZ · On-site
... development, we offer capabilities and opportunity no one else can. Together, we push the ... As an Electrical Engineer II you will develop FPGA designs for all major vendors and device ...
Senior FPGA Engineer with Security Clearance
Chandler, AZ · On-site
$101K - $136K/yr
Qualifications • Strong digital design engineer with FPGA/ASIC SoC design experience • Strong ... development with C, C++ and GIT version control • Proficient in Microsoft Office Tools (Word ...
Senior FPGA Engineer with Security Clearance
Chandler, AZ · On-site
$101K - $136K/yr
Qualifications • Strong digital design engineer with FPGA/ASIC SoC design experience • Strong ... development with C, C++ and GIT version control • Proficient in Microsoft Office Tools (Word ...
We engage at the outset of the weapon system development and follow our designs through deployment ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
We engage at the outset of the weapon system development and follow our designs through deployment ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
Tucson, AZ · On-site
$98K - $132K/yr
We engage at the outset of the weapon system development and follow our designs through deployment ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
Tucson, AZ · On-site
$98K - $132K/yr
We engage at the outset of the weapon system development and follow our designs through deployment ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
We engage at the outset of the weapon system development and follow our designs through deployment ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
We engage at the outset of the weapon system development and follow our designs through deployment ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
Tucson, AZ · On-site
$98K - $132K/yr
We engage at the outset of the weapon system development and follow our designs through deployment ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior Principal Electrical Engineer-FPGA Design- Onsite Tucson, AZ
Tucson, AZ · On-site
$98K - $132K/yr
We engage at the outset of the weapon system development and follow our designs through deployment ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior Principal Electrical Engineer-FPGA Design- Onsite Tucson, with Security Clearance
Tucson, AZ · On-site
$96K - $130K/yr
We engage at the outset of the weapon system development and follow our designs through deployment ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Senior Principal Electrical Engineer-FPGA Design- Onsite Tucson, with Security Clearance
Tucson, AZ · On-site
$96K - $130K/yr
We engage at the outset of the weapon system development and follow our designs through deployment ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
The MEMS Sensor Sub-Group is responsible for the development activities of new products and ... The intern can face some unique challenges including both ASIC and MEMs design or quality issues.
The MEMS Sensor Sub-Group is responsible for the development activities of new products and ... The intern can face some unique challenges including both ASIC and MEMs design or quality issues.
The MEMS Sensor Sub-Group is responsible for the development activities of new products and ... The intern can face some unique challenges including both ASIC and MEMs design or quality issues.
The MEMS Sensor Sub-Group is responsible for the development activities of new products and ... The intern can face some unique challenges including both ASIC and MEMs design or quality issues.
The MEMS Sensor Sub-Group is responsible for the development activities of new products and ... The intern can face some unique challenges including both ASIC and MEMs design or quality issues.
The MEMS Sensor Sub-Group is responsible for the development activities of new products and ... The intern can face some unique challenges including both ASIC and MEMs design or quality issues.
Asic Development Engineer information
What engineer makes $500,000 a year?
What is the difference between Asic Development Engineer vs FPGA Design Engineer?
| Aspect | Asic Development Engineer | FPGA Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's or Master's in Electrical Engineering, VLSI, or related fields; knowledge of ASIC design tools | Bachelor's or Master's in Electrical Engineering, Digital Design; familiarity with FPGA development tools |
| Work Environment | Designing and verifying custom silicon chips in semiconductor labs or R&D centers | Developing and testing FPGA-based solutions in hardware labs or embedded systems environments |
| Industry Usage | Used in semiconductor companies, integrated circuit design firms, and tech giants | Common in telecommunications, aerospace, and embedded systems industries |
While both roles involve digital hardware design, Asic Development Engineers focus on creating custom chips for high-performance applications, whereas FPGA Design Engineers work on programmable hardware solutions. Both require strong digital design skills and familiarity with hardware description languages, but their end products and development environments differ.
What engineers make $300,000 a year?
Are ASIC engineers in demand?
How much do ASIC engineers get paid?
Full-time
Posted 11 days ago
Microchip Technology rating
8.1
Based on 31 frontline employees who took The Breakroom Quiz
40th of 139 rated electronics manufacturers
Job description
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
Microchip's NCS Team is seeking an experienced Design engineer to support PHY (Physical Layer) development for our next generation of USB products. The role will include working with analog and digital engineers to create mixed-signal IPs and SoC products. As a Principal Digital Design Engineer, the candidate shall be working with multi-sited global Silicon Development Team in the areas of RTL design, design verification, synthesis, STA, and Test using an industry leading ASIC design flow. Candidate must be in the Chandler design center.
Requirements/Qualifications:
- Bachelors degree with at least 10 years of experience in digital design with solid, hands-on experience in RTL Coding and functional verification.
- Experience in USB and Ethernet PHY protocols is a strong plus-point.
- Must have knowledge and experience in Verilog/System Verilog design and test bench creation.
- Must have excellent debug skills in both functional and gate level simulations
- Experience with Verification methodologies such as UVM/VMM is a desired skillset.
- Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT methodology, equivalence checking and synthesis.
- Hands-on experience required with Mentor and Synopsys CAD tools such as Questa, Design Compiler, Formality and Spyglass.
- Knowledge in synthesis for defining timing constraints to chip-level integration team and for supporting timing closure for sub-blocks.
- Ability to solve timing constraint challenges including asynchronous designs with multipleclock domain crossings and for synchronous designs.
- Knowledge of ASIC test methodology such as Stuck-At/At-Speed scan insertion is a plus.
- Proficiency in a scripting language such as C, TCL, Perl, Awk, UNIXshell.
- Knowledge of revision control tools such as CVS, Perforce, DesignSync, etc. and experience with tagging and release methodology
- Support chip-level integration, verification, and validation teams
- Provide design documentation, description, and information to internal customers.
- Ability to work as part of digital, analog, and DSP design team and as part of global multi-sited Development team.
- The candidate must possess good verbal and writtenskills andbe able to participate in group meetings, provide project updates, andwrite functional and technical documents.Be proactiveand be willingto learn and adapt quickly in a dynamic and cross-functional environment.
Travel Time:
0% - 25%Physical Attributes:
Hearing, Seeing, Talking, Works Alone, Works Around OthersPhysical Requirements:
80% sitting, 10% standing, 10% walking, 100% insideMicrochip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
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About Microchip
Sourced by ZipRecruiter
Industry
It services
Company size
10,000+ Employees
Headquarters location
Chandler, AZ, US
Year founded
1989