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Asic Development Engineer Jobs in Arizona (NOW HIRING)

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Asic Development Engineer information

What engineer makes $500,000 a year?

An experienced ASIC Development Engineer working in high-demand industries such as semiconductor design or advanced chip development can earn $500,000 or more annually, especially with seniority, specialized skills, and performance bonuses. Such roles often require expertise in hardware description languages, verification tools, and a strong understanding of integrated circuit design.

What is the difference between Asic Development Engineer vs FPGA Design Engineer?

AspectAsic Development EngineerFPGA Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; knowledge of ASIC design toolsBachelor's or Master's in Electrical Engineering, Digital Design; familiarity with FPGA development tools
Work EnvironmentDesigning and verifying custom silicon chips in semiconductor labs or R&D centersDeveloping and testing FPGA-based solutions in hardware labs or embedded systems environments
Industry UsageUsed in semiconductor companies, integrated circuit design firms, and tech giantsCommon in telecommunications, aerospace, and embedded systems industries

While both roles involve digital hardware design, Asic Development Engineers focus on creating custom chips for high-performance applications, whereas FPGA Design Engineers work on programmable hardware solutions. Both require strong digital design skills and familiarity with hardware description languages, but their end products and development environments differ.

What engineers make $300,000 a year?

Senior engineers in specialized fields such as ASIC development, software engineering, or data science can earn $300,000 or more annually, especially with extensive experience, advanced skills, and working in high-demand industries or companies. These roles often require advanced degrees, certifications, and expertise in tools like FPGA, VHDL, or Verilog, along with leadership responsibilities.

Are ASIC engineers in demand?

ASIC development engineers are in high demand due to the growth of industries like consumer electronics, telecommunications, and automotive systems that require custom integrated circuits. Skills in hardware description languages such as VHDL or Verilog, along with experience in FPGA prototyping, enhance employability in this field.

How much do ASIC engineers get paid?

ASIC development engineers typically earn between $80,000 and $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills or certifications can earn higher salaries, often exceeding $180,000. Compensation may also include bonuses and stock options in some organizations.
What job categories do people searching Asic Development Engineer jobs in Arizona look for? The top searched job categories for Asic Development Engineer jobs in Arizona are:
What cities in Arizona are hiring for Asic Development Engineer jobs? Cities in Arizona with the most Asic Development Engineer job openings:
Principal Engineer - Digital Design

Principal Engineer - Digital Design

Microchip Technology

Chandler, AZ • On-site

Full-time

Posted 11 days ago


Microchip Technology rating

8.1

Company rating: 8.1 out of 10

Based on 31 frontline employees who took The Breakroom Quiz

40th of 139 rated electronics manufacturers


Job description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

Microchip's NCS Team is seeking an experienced Design engineer to support PHY (Physical Layer) development for our next generation of USB products. The role will include working with analog and digital engineers to create mixed-signal IPs and SoC products. As a Principal Digital Design Engineer, the candidate shall be working with multi-sited global Silicon Development Team in the areas of RTL design, design verification, synthesis, STA, and Test using an industry leading ASIC design flow. Candidate must be in the Chandler design center.

Requirements/Qualifications:

  • Bachelors degree with at least 10 years of experience in digital design with solid, hands-on experience in RTL Coding and functional verification.
  • Experience in USB and Ethernet PHY protocols is a strong plus-point.
  • Must have knowledge and experience in Verilog/System Verilog design and test bench creation.
  • Must have excellent debug skills in both functional and gate level simulations
  • Experience with Verification methodologies such as UVM/VMM is a desired skillset.
  • Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT methodology, equivalence checking and synthesis.
  • Hands-on experience required with Mentor and Synopsys CAD tools such as Questa, Design Compiler, Formality and Spyglass.
  • Knowledge in synthesis for defining timing constraints to chip-level integration team and for supporting timing closure for sub-blocks.
  • Ability to solve timing constraint challenges including asynchronous designs with multipleclock domain crossings and for synchronous designs.
  • Knowledge of ASIC test methodology such as Stuck-At/At-Speed scan insertion is a plus.
  • Proficiency in a scripting language such as C, TCL, Perl, Awk, UNIXshell.
  • Knowledge of revision control tools such as CVS, Perforce, DesignSync, etc. and experience with tagging and release methodology
  • Support chip-level integration, verification, and validation teams
  • Provide design documentation, description, and information to internal customers.
  • Ability to work as part of digital, analog, and DSP design team and as part of global multi-sited Development team.
  • The candidate must possess good verbal and writtenskills andbe able to participate in group meetings, provide project updates, andwrite functional and technical documents.Be proactiveand be willingto learn and adapt quickly in a dynamic and cross-functional environment.

Travel Time:

0% - 25%

Physical Attributes:

Hearing, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements:

80% sitting, 10% standing, 10% walking, 100% inside

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.


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