ZipRecruiter

Log In

1

Analog Layout Engineer Jobs (NOW HIRING)

Apple

Analog Layout Automation Engineer

Cupertino, CA · On-site

$249K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Apple

Analog Layout Automation Engineer

Austin, TX · On-site

$200K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Nokia

Staff Custom Analog Layout Engineer

San Jose, CA · On-site

$139K - $258K/yr

Decent understanding in analog layout requirements, such as matching and shielding; * Has extensive experience in the layout of low-power, high-resolution circuits, such as SD-ADC, SAR-ADC, bandgap ...

Apple

Analog Layout Automation Engineer

San Diego, CA

$118K - $207K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Apple

Analog Layout Automation Engineer

Cupertino, CA

$123K - $218K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Apple

RFIC Layout Engineer

San Francisco, CA · On-site

To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... Description As an RFIC Layout Engineer, you will be a key member of a RFIC team, researching ...

Apple

Analog Layout Automation Engineer

Cupertino, CA

$175K - $311K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Apple

Analog Layout Automation Engineer

San Diego, CA

$166K - $296K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Apple

Analog Layout Automation Engineer

Austin, TX

$157K - $280K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Apple

Analog Layout Automation Engineer

Austin, TX

$157K - $280K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Apple

RFIC Layout Engineer

San Francisco, CA · On-site

To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... Description As an RFIC Layout Engineer, you will be a key member of a RFIC team, researching ...

Apple

Analog Layout Automation Engineer

Austin, TX

$157K - $280K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Apple

Analog Layout Automation Engineer

Austin, TX

$157K - $280K/yr

We're seeking a highly skilled Analog Layout Automation Engineer to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits, covering SerDes, PLLs, and sensors, with a focus on automation ...

Apple

RFIC Layout Engineer

San Francisco, CA · On-site

To deliver these radios, our team is responsible for the design of a wide range of RF, analog, and ... Description As an RFIC Layout Engineer, you will be a key member of a RFIC team, researching ...

Neuralink

Analog IC Layout Engineer

Fremont, CA · On-site

As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art layouts for mixed-signal and analog circuits * Amplifiers * Filters * Switched capacitor circuits

next page

Showing results 1-20

All JobsAnalog Layout Engineer Jobs

Analog Layout Engineer information

See salary details

$77K

$186.2K

$203K

How much do analog layout engineer jobs pay per year?

As of Jul 5, 2026, the average yearly pay for analog layout engineer in the United States is $186,238.00, according to ZipRecruiter salary data. Most workers in this role earn between $202,000.00 and $202,000.00 per year, depending on experience, location, and employer.

What are Analog Layout Engineers?

Analog Layout Engineers are specialized professionals who design the physical layout of analog and mixed-signal integrated circuits (ICs). They translate circuit schematics into detailed geometric representations that can be manufactured on silicon wafers. Their work includes placement and routing of transistors, resistors, capacitors, and interconnects, ensuring optimal performance, area, and reliability. They collaborate closely with circuit designers to meet electrical and physical requirements, and use electronic design automation (EDA) tools to create and verify layouts.

What are some common challenges Analog Layout Engineers face when collaborating with circuit designers?

Analog Layout Engineers often work closely with circuit designers to translate schematics into physical layouts, which can present challenges such as resolving conflicting design requirements or optimizing for both performance and manufacturability. Miscommunications can occur regarding layout constraints, parasitic effects, or changes in design specifications. Successful collaboration requires clear communication, proactive problem-solving, and regular design reviews to ensure that the final layout meets all electrical, physical, and timing requirements.

What are the key skills and qualifications needed to thrive as an Analog Layout Engineer, and why are they important?

To thrive as an Analog Layout Engineer, you need strong knowledge of semiconductor physics, circuit design principles, and experience with analog/mixed-signal layout, typically supported by a degree in electrical engineering or a related field. Proficiency with EDA tools such as Cadence Virtuoso, DRC/LVS verification tools, and familiarity with IC fabrication processes are crucial. Attention to detail, problem-solving, and effective communication are important soft skills for collaborating with design teams and ensuring design accuracy. These skills and qualities are essential for creating high-performance, manufacturable integrated circuits that meet stringent specifications and timelines.

What is the difference between Analog Layout Engineer vs Digital IC Layout Engineer?

AspectAnalog Layout EngineerDigital IC Layout Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, specialized in analog designBachelor's or Master's in Electrical Engineering, focused on digital design
Work EnvironmentDesigning analog circuits, working closely with circuit designersImplementing digital logic layouts, collaborating with digital design teams
Industry UsageSemiconductor companies, ASIC/FPGA designSemiconductor companies, ASIC/FPGA design
Common Search/ComparisonAnalog Layout Engineer vs Digital IC Layout Engineer

Both roles involve IC layout design within the semiconductor industry, but Analog Layout Engineers focus on analog circuits requiring precise analog signal handling, while Digital IC Layout Engineers work on digital logic circuits. The skills, tools, and design considerations differ, making each role specialized within the chip design process.

More about Analog Layout Engineer jobs
What cities are hiring for Analog Layout Engineer jobs? Cities with the most Analog Layout Engineer job openings:
What are the most commonly searched types of Analog Layout Engineer jobs? The most popular types of Analog Layout Engineer jobs are:
What states have the most Analog Layout Engineer jobs? States with the most job openings for Analog Layout Engineer jobs include:
What job categories do people searching Analog Layout Engineer jobs look for? The top searched job categories for Analog Layout Engineer jobs are:
Analog Layout Engineer jobs near you
Senior Manager, Analog Layout Design

Senior Manager, Analog Layout Design

Marvell Technology, Inc.

Santa Clara, CA • On-site

Full-time

Life, Retirement

Posted 27 days ago

Job description

About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
As an Analog Layout Manager with Marvell, you'll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Data Center, Storage, Security, and Networking. You'll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects.
What You Can Expect
We are seeking an experienced Analog Layout Senior Manager to lead and grow a team of analog layout engineers responsible for delivering high-quality physical layout solutions for high-speed, mixed-signal, and advanced technology integrated circuits products. This role combines technical leadership, people management, project execution, and methodology development to ensure successful delivery of complex semiconductor products across multiple technology nodes and product generations.
The ideal candidate possesses deep expertise in analog and mixed-signal layout design, strong leadership skills, and a proven track record of delivering successful tapeouts in advanced process technologies.
Team Leadership and People Management
  • Lead, mentor, and develop a high-performing team of analog layout engineers through technical coaching, performance management, career development, and succession planning.
  • Foster a culture of ownership, accountability, collaboration, innovation, and technical excellence.
  • Drive hiring, onboarding, retention, and growth of top engineering talent while developing future technical and organizational leaders.
  • Provide clear direction, motivation, and support to enable team success and continuous professional development.

Project Execution and Delivery
  • Own layout execution planning, resource allocation, schedule management, and quality delivery across multiple projects.
  • Ensure timely completion of layout milestones while maintaining high standards of quality and design integrity.
  • Partner with program management and engineering leadership to identify risks, establish priorities, and drive project execution.

Technical Leadership
  • Provide technical guidance for analog and mixed-signal layout implementation in advanced technologies, including FinFET, CMOS and BiCMOS processes.
  • Oversee layout development for high-speed and mixed-signal circuits.
  • Lead layout reviews to ensure compliance with design requirements, foundry rules, reliability standards, and industry best practices.
  • Drive robust implementation of matching, shielding, isolation, noise mitigation, electromigration, EM/IR, ESD protection, and manufacturability considerations.

Cross-Functional Collaboration
  • Collaborate closely with circuit design, physical design, CAD, verification, reliability, and program management teams throughout the product development cycle.
  • Support debugging, silicon bring-up activities, root-cause analysis, yield improvement initiatives, and post-tapeout issue resolution.
  • Facilitate effective communication and alignment across geographically distributed engineering teams.

Methodology and Continuous Improvement
  • Drive improvements in layout methodologies, automation, reusable IP strategies, verification flows, and overall execution efficiency.
  • Establish and maintain layout design standards, review processes, checklists, and best practices.
  • Evaluate and deploy new EDA technologies, tools, and workflow enhancements to improve efficiency and design quality.
  • Stay current with emerging semiconductor technologies, industry trends, and layout methodologies.

What We're Looking For
  • Bachelor's or Master's degree in Electrical Engineering, Microelectronics, or a related field.
  • 10+ years of analog layout design experience, including 3+ years in a leadership role managing teams, projects, or technical execution.
  • Strong hands-on expertise in advanced analog, high-speed, and mixed-signal layout design, with experience in circuits such as SerDes, PLLs, ADCs/DACs, TIAs, drivers, clocking, power management, and other mixed-signal blocks.
  • Deep understanding of semiconductor devices, process technologies, parasitics, matching, shielding, isolation, reliability, manufacturability, and physical design best practices.
  • Proficiency with industry-standard EDA tools, including Cadence Virtuoso, Calibre, PVS, StarRC, or equivalent.
  • Experience with advanced FinFET process nodes and a proven track record of multiple successful tapeouts.
  • Demonstrated ability to lead, mentor, and scale high-performing engineering teams while driving layout methodology, automation, productivity improvements, and technical excellence.
  • Strong project management, prioritization, problem-solving, decision-making, communication, and collaboration skills, with the ability to influence and work effectively across cross-functional and global engineering teams.

Expected Base Pay Range (USD)
136,620 - 204,700, $ per annum
The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
#LI-TD1

Apply