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Ai Chip Design Rtl Jobs in Oregon (NOW HIRING)

An important key aspect of this position is driving innovation through building generative AI ... Apple's chip design efforts. Minimum Qualifications Minimum of BS degree + 3 years of relevant ...

... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... An important key aspect of this position is driving innovation through building generative AI ...

Demonstrate knowledge of Verilog for chip design and verification. * Must understand the ASIC flow from MAS to silicon including RTL design, verification, synthesis, timing constraints, GLS, FPGA ...

SoC Physical Design Verification Engineer

Beaverton, OR · On-site

$141K - $145K/yr

We work directly with the implementation team during the entire chip design cycle to drive signoff ... RTL to GDS physical design flow Scripting skills to debug flow related issues and make enhancements ...

In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...

In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...

In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...

In this highly visible role, you will be at the center of a chip design effort collaborating with ... RTL designers on verifying the functional correctness of the design • Develop test plans and test ...

Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart ... chip designs. Participates actively in the definition of architecture and microarchitecture ...

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Ai Chip Design Rtl information

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What are some common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What are AI Chip Design RTL engineers?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What are the key skills and qualifications needed to thrive as an AI Chip Design RTL Engineer, and why are they important?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
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FE RTL Infrastructure - CAD Engineer

FE RTL Infrastructure - CAD Engineer

Apple

Beaverton, OR • On-site

$172K/yr

Full-time

Posted 16 days ago


Apple rating

8.1

Company rating: 8.1 out of 10

Based on 662 frontline employees who took The Breakroom Quiz

6th of 30 rated technology retailers


Job description

Do you love building elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices!
Description
As a Front-End (FE) RTL Infrastructure - CAD Engineer, you will play a major role in developing and supporting a reliable infrastructure and work environments that design and verification teams use for modifying, analyzing, and verifying RTL.
In this role, you will support RTL gatekeeping infrastructure of design and verification collateral as well as soft IP development and release methodologies. Additionally, you will contribute to Perforce administration, ensuring the integrity and performance of our version control ecosystem. You will have the opportunity to maintaining a centralized configuration management system that enables different design views to be loaded into any Front-End flow.
An important key aspect of this position is driving innovation through building generative AI solutions across all of these systems and identifying opportunities where AI can accelerate engineering productivity and improve infrastructure reliability. You role will also involve managing internal training materials, keeping them up to date and coordinating vendor trainings so that our Designer/DV engineers are well equipped to do their best job at Apple.
The FE RTL Infrastructure - CAD Engineer plays a key role in promoting and driving robust, scalable infrastructure solutions across RTL Design and DV teams within Apple's HWTech organization.
In short, this position focuses in fostering our North Star and making sure that our vision statement extends across the different design groups:
To create, monitor, and maintain high quality infrastructure and flows that enable Apple Silicon to produce chips that enable Apple's best products. You will be working with an energized and highly motivated CAD team that comprehensively supports Apple's chip design efforts.
Minimum Qualifications
Minimum of BS degree + 3 years of relevant experience
Expertise in programming in Python or Perl
Knowledge in Verilog and SystemVerilog
Preferred Qualifications
Experience with Front-End EDA tools such as Clock Domain Crossing, Reset Domain Crossing or Lint
Understanding of Front-End RTL Build or Construction flows
Excellent communication, debug and root causing skills
Customer-oriented mindset and support experience
Experience in contributing to large-scale software system development from specification to deployment
MSEE/CE/CS preferred

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Benefits

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976