ZipRecruiter

Log In

1

Ai Chip Design Rtl Jobs in Oregon (NOW HIRING)

Intel

RTL Design Engineer

Hillsboro, OR · On-site

$105K - $200K/yr

Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip ...

Apple

RTL Design Engineer

Beaverton, OR

$141K/yr

You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...

Apple

RTL Design Engineer

Beaverton, OR

$141K/yr

You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...

Apple

RTL Design Engineer

Beaverton, OR · On-site

You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...

Apple

RTL Design Engineer

Beaverton, OR · On-site

You will be responsible for RTL coding of blocks specified by you or others, including ... Using AI tools for SystemVerilog design, validation, optimization, and understanding GenAI ...

Nvidia

OR · Hybrid

As we lead innovation in AI and accelerated computing, we seek a Senior LPU ASIC Engineer to ... in chip design. At NVIDIA, you'll collaborate with extraordinary talent and thrive in an ...

Apple

Emulation Verification Engineer

Beaverton, OR

$141K - $172K/yr

In this highly transparent role, you will be at the center of a chip design effort collaborating ... RTL to Emulation is a huge plus Good understanding of any Standard Emulator (Palladium, Veloce ...

Apple

Emulation Verification Engineer

Beaverton, OR

$141K - $172K/yr

In this highly transparent role, you will be at the center of a chip design effort collaborating ... RTL to Emulation is a huge plus Good understanding of any Standard Emulator (Palladium, Veloce ...

Apple

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

In this highly transparent role, you will be at the center of a chip design effort collaborating ... Preferred Qualifications Understanding of the tool flow from RTL to Emulation is a huge plus Good ...

Apple

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

In this highly transparent role, you will be at the center of a chip design effort collaborating ... Preferred Qualifications Understanding of the tool flow from RTL to Emulation is a huge plus Good ...

next page

Showing results 1-20

All JobsAi Chip Design Rtl JobsAi Chip Design Rtl Jobs in Oregon

Ai Chip Design Rtl information

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What are some common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What are AI Chip Design RTL engineers?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What are the key skills and qualifications needed to thrive as an AI Chip Design RTL Engineer, and why are they important?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
What are popular job titles related to Ai Chip Design Rtl jobs in Oregon? For Ai Chip Design Rtl jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Ai Chip Design Rtl jobs in Oregon look for? The top searched job categories for Ai Chip Design Rtl jobs in Oregon are:
What cities in Oregon are hiring for Ai Chip Design Rtl jobs? Cities in Oregon with the most Ai Chip Design Rtl job openings:
Ai Chip Design Rtl jobs near you
RTL Design Engineer

RTL Design Engineer

Intel

Hillsboro, OR • On-site

$105K - $200K/yr

Full-time

Medical, Retirement, PTO

Posted 8 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 144 frontline employees who took The Breakroom Quiz

10th of 139 rated electronics manufacturers

Job description

Job Details:Job Description: Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs. Participates actively in the definition of architecture and microarchitecture features of the CPU being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Documents micro architectural specs (MAS) of the CPU features being designed. Supports SoC customers to ensure highquality integration of the CPU block.Qualifications:Minimum QualificationsThe candidate must have a Bachelor's Degree in Electrical or Computer Engineering or any STEM related education with at least 2+ years of experience -OR- Master's Degree in Electrical or Computer EngineeringAt least 1+ years of coursework or experience in the following areas:oBasic Logic DesignoMicroprocessorsoComputer ArchitectureoDigital design and RTL codingoVerilog/SystemVerilog and/or VHDLoSynthesis tools (Design Compiler, Genus)oScripting languages (Python, Perl, TCL)Preferred QualificationsExperience with advanced verification methodologies (UVM, OVM)Knowledge of low-power design techniquesUnderstanding of physical design constraints and timing closureExperience with version control systems (Git, Perforce)Experience with simulation tools (ModelSim, VCS, Xcelium)Job Type:College GradShift:Shift 1 (United States of America)Primary Location: US, Texas, AustinAdditional Locations:US, Arizona, Phoenix, US, Oregon, HillsboroBusiness group:Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

What Intel employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

Intel logo

About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

View All Intel Jobs

Apply