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Weekend Digital Verification Engineer Jobs (NOW HIRING)

Senior UVM Digital Verification Engineer

Cambridge, MA ยท On-site

$114K - $156K/yr

Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply ...

Senior UVM Digital Verification Engineer

Cambridge, MA ยท On-site

$113K - $153K/yr

Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply ...

Design Verification Engineer

Dallas, TX ยท On-site

$135K - $164K/yr

Fiori Technology Solutions is currently hiring for a Design Verification Engineer. This is fulltime ... Digital verification for complex SoC with MCUs (ARM CM0+/CM3/4/CM33) with complex peripherals ...

Senior SoC Design Verification Engineer

Dallas, TX ยท On-site

$135K - $164K/yr

Fiori Technology Solutions is currently hiring for a Design Verification Engineer. This is fulltime ... Digital verification for complex SoC with MCUs (ARM CM0+/CM3/4/CM33) with complex peripherals ...

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Weekend Digital Verification Engineer information

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$80K

$142.6K

$203.5K

How much do weekend digital verification engineer jobs pay per year?

As of Aug 9, 2026, the average yearly pay for weekend digital verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.
What are the most commonly searched types of Digital Verification Engineer jobs? The most popular types of Digital Verification Engineer jobs are:
Infographic showing various Weekend Digital Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 69% Full Time, 25% Part Time, 4% Contract, and 1% Nights. Highlights an 94% Physical, 1% Hybrid, and 5% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.

Mixed Signal Verification Engineer

Retym

Austin, TX โ€ข On-site

$134K/yr

Full-time

Re-posted 23 days ago


Job description

Description
For an exciting well-funded start-up, developing leading edge technology of the next generation high speed communication, we are looking for a Mixed signal verification engineer.
Requirements
Key Responsibilities:
  • Develop verification strategies for digital and analog (mixed-signal) designs, utilizing UVM methodologies based on specifications.
  • Create behavioural models for analog blocks in accordance with guidelines provided by analog designers.
  • Write, execute, and debug testbenches using UVM methodology and SystemVerilog code for mixed-signal blocks.
  • Run and debug behavioural model (BM) validation using AMS tools to ensure the correctness of the behavioural models.
  • Perform and troubleshoot unit-level, cluster-level and top-level simulations of mixed-signal designs.

Minimum Qualifications
  • 5+ years of experience
  • Experience in Behavioural Modelling (BM) of Analog design for digital verification
  • Knowledge in Mixed Signals dynamic Verification using chip digital design tools [no AMS]
  • Experience in Verilog/SystemVerilog coding
  • Experience in Virtuoso Schematics tools
  • Basic knowledge in Analog design

Preferred Qualifications
  • Experience in UVM
  • Experience in both Synopsys and Cadence tools is an advantage

Additional Skills
  • Verification Methodologies and Tools: Familiarity with verification methodologies and tools, including simulators, waveform viewers, execution automation, and coverage collection. Proven experience in developing scalable and portable test cases.
  • Collaborative Environment: Ability to verify Analog/mixed-signal designs in a collaborative team environment.
  • Communication: Strong communication skills, including the ability to write test plans, present results, and communicate clearly with multi-functional teams.