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Weekend Digital Verification Engineer Jobs (NOW HIRING)

Silicon Labs

Digital Verification Engineer I

Austin, TX · On-site

$84K - $156K/yr

Experience with Verilog and SystemVerilog for digital design and verification through professional setting, internships, coursework, research, or project work. * Programming and scripting experience ...

Apple

Wireless Radio Verification Engineer

San Diego, CA · On-site

$144.40K/yr

As a Wireless Radio Verification Engineer, you'll verify Radio digital controllers combined with RF subsystems that enable exceptional wireless performance. You'll develop verification environments ...

Draper

Senior UVM Digital Verification Engineer

Cambridge, MA · On-site

$113.70K - $153K/yr

Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply ...

Draper

Senior UVM Digital Verification Engineer

Cambridge, MA

$114.20K - $156.80K/yr

Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification challenges in FPGAs and ASICs. In this role, you will apply ...

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How much do weekend digital verification engineer jobs pay per year?

As of May 29, 2026, the average yearly pay for weekend digital verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.
What are the most commonly searched types of Digital Verification Engineer jobs? The most popular types of Digital Verification Engineer jobs are:
Weekend Digital Verification Engineer jobs near you
Infographic showing various Weekend Digital Verification Engineer job openings in the United States as of May 2026, with employment types broken down into 1% As Needed, 67% Full Time, 29% Part Time, and 3% Contract. Highlights an 92% Physical, 5% Hybrid, and 3% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.
Digital Verification Engineer I

Digital Verification Engineer I

Silicon Labs

Austin, TX • On-site

$84K - $156K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

This job post has expired today. Applications are no longer accepted.

Job description

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world's most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com.
Meet the Team
You'll join the Modem Verification (IP Verification) team, which ensures the quality and reliability of Silicon Labs' ASIC IP used in IoT applications. The team focuses on verifying complex digital designs for modem systems, applying advanced verification techniques to guarantee robust performance across real-world wireless scenarios. This critical work helps deliver low-power, high-performance solutions trusted across a wide range of connected devices.
Responsibilities
  • Contribute to the verification of ASIC IP blocks used in wireless modem designs for IoT applications.

  • Develop and maintain verification environments, testbenches, and simulations using Verilog and SystemVerilog.

  • Support automated testing and verification flows through C programming and scripting.

  • Analyze simulation results, identify root causes of failures, and debug design or verification issues in collaboration with cross-functional engineering teams.

  • Participate in verification planning, test development, coverage analysis, and regression execution.

  • Document verification results, communicate technical findings, and contribute ideas to improve methodologies and workflows.

  • Collaborate with design, architecture, and software teams to ensure high-quality IP delivery.

Skills You Need
Minimum Qualifications
  • Bachelor's, Master's, or PhD degree in Electrical Engineering, Computer Engineering, or a related field.

  • Experience with Verilog and SystemVerilog for digital design and verification through professional setting, internships, coursework, research, or project work.

  • Programming and scripting experience in C and scripting languages such as Python, Perl, or similar.

  • Understanding of digital design fundamentals, computer architecture, VLSI concepts, or embedded systems.

  • Hands-on experience with simulation, debugging, or FPGA prototyping through academic or internship projects.

  • Strong analytical, problem-solving, and communication skills.

The following qualifications will be considered a plus:
  • Knowledge of UVM (Universal Verification Methodology).

  • Exposure to ASIC or IP verification methodologies and tools.

  • Experience debugging complex digital systems and analyzing simulation failures.

  • Familiarity with digital communication systems or wireless modem architectures.

  • Prior internship or project experience related to verification, RTL development, or semiconductor design.

Benefits & Perks
You can look forward to the following benefits:
  • Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans

  • Highly competitive salary

  • 401k plan with match and Roth plan option

  • Equity rewards (RSUs)

  • Life/AD&D and disability coverage

  • Flexible spending accounts

  • Adoption assistance

  • Back-Up childcare

  • Additional benefit options (Commuter benefits, Legal benefits, Pet insurance)

  • Flexible PTO schedule

  • 3 paid volunteer days per year

  • Tuition reimbursement

  • Free downtown parking

  • Onsite gym

  • Monthly wellness offerings

  • Free snacks

  • Monthly company updates with our CEO

#LI-MA1
#LI-Hybrid
The annualized base pay range for this role is expected to be between $84,000 - $156,000 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant's skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.
Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.

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