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Vlsi Dft Jobs (NOW HIRING)

Apple

GPU Physical Design Engineer

Austin, TX

$134K - $138K/yr

Experience or coursework in one or more of the following areas: physical design, synthesis, DFT or clocking. Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI ...

Apple

GPU Physical Design Engineer

Austin, TX

$134K - $138K/yr

Experience or coursework in one or more of the following areas: physical design, synthesis, DFT or clocking. Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI ...

Apple

GPU Physical Design Engineer

Austin, TX · On-site

$134K - $138K/yr

Experience or coursework in one or more of the following areas: physical design, synthesis, DFT or clocking. Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI ...

Apple

Graphics FE Integration Engineer

Austin, TX · On-site

$138K - $171K/yr

... DFT logic and power intent. Description As a GPU Design Integration Engineer, you will be ... VLSI design. Proficiency in programming techniques and scripting languages (Perl/Ruby/Python)

Apple

Graphics FE Integration Engineer

Austin, TX

$138K - $171K/yr

... DFT logic and power intent. Description As a GPU Design Integration Engineer, you will be ... VLSI design. Proficiency in programming techniques and scripting languages (Perl/Ruby/Python)

Sivaltech

PD Engineer

San Diego, CA · On-site

$144K - $148K/yr

Collaborate with RTL, Design Verification, DFT, and STA teams to achieve successful tape-outs ... VLSI #STA #TimingClosure #Floorplanning #CTS #Routing #ICC2 #Innovus #PrimeTime #BayAreaJobs ...

TSMC

Physical Design Engineer (7452)

San Jose, CA · On-site

$155K - $160K/yr

This is an exciting opportunity for an engineer with a strong foundation in VLSI design, a passion ... Collaborate effectively with cross-functional teams, including RTL, DFT, and CAD, to provide ...

TSMC

Physical Design Engineer (7452)

San Jose, CA · On-site

$155K - $160K/yr

This is an exciting opportunity for an engineer with a strong foundation in VLSI design, a passion ... Collaborate effectively with cross-functional teams, including RTL, DFT, and CAD, to provide ...

Apple

Graphics FE Implementation Engineer

Austin, TX · On-site

... CMOS VLSI design Experience with at least one scripting language (python/perl/tcl) BS required ... DFT methodologies Knowledge of static timing analysis concepts (setup and hold timing ...

Apple Inc.

GPU Physical Design Engineer

Austin, TX · On-site

$180 - $240/hr

Experience or coursework in one or more of the following areas: physical design, synthesis, DFT or clocking. * Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI ...

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How much do vlsi dft jobs pay per hour?

As of Aug 14, 2026, the average hourly pay for vlsi dft in the United States is $31.52, according to ZipRecruiter salary data. Most workers in this role earn between $25.72 and $35.34 per hour, depending on experience, location, and employer.

Is Vlsi Dft a good career?

VLSI DFT (Design for Testability) is a specialized field within semiconductor design that focuses on making integrated circuits easier to test and verify. It offers opportunities in the semiconductor industry, requiring skills in digital design, testing methodologies, and EDA tools. The career can be stable and rewarding for those with technical expertise and an interest in hardware design and testing processes.

What is a VLSI DFT?

A VLSI DFT (Design for Test) job involves designing and implementing testability features in integrated circuits to ensure efficient manufacturing testing and fault detection. Engineers work on techniques like scan chains, built-in self-test (BIST), boundary scan, and automatic test pattern generation (ATPG) to improve chip test coverage and reliability. Their role helps identify manufacturing defects and optimize testing costs while ensuring high-quality silicon.

What are the key skills and qualifications needed to thrive in the VLSI DFT position, and why are they important?

To thrive as a VLSI DFT (Design-for-Test) engineer, you need a solid background in digital design, test methodologies, and a relevant degree such as Electrical or Electronics Engineering. Proficiency with EDA tools like Synopsys DFT Compiler, Tessent, or Cadence, along with a good understanding of scripting languages and industry-standard protocols, is typically required. Strong problem-solving abilities, attention to detail, and effective communication are vital soft skills in this role. These competencies are crucial for designing efficient, testable chips and collaborating with cross-functional teams to ensure product quality and manufacturability.

What are some typical challenges faced by VLSI DFT engineers, and how can candidates best prepare for them?

VLSI DFT engineers often encounter challenges such as optimizing test coverage without impacting design performance, managing test data volume, and integrating test features into complex chip designs. Staying up-to-date with evolving industry standards and tools, along with strong analytical skills, can help overcome these hurdles. Candidates can best prepare by gaining hands-on experience with leading DFT tools, understanding scan insertion and ATPG methodologies, and collaborating closely with design and verification teams. Emphasizing continuous learning and adaptability will set you up for long-term success in this dynamic and highly technical field.

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Vlsi Dft jobs near you
Infographic showing various Vlsi Dft job openings in the United States as of August 2026, with employment types broken down into 33% Full Time, and 67% Contract. Highlights an 100% In-person job distribution, with an average salary of $65,566 per year, or $31.5 per hour.

GPU Physical Design Engineer

Apple

Austin, TX

$134K - $138K/yr

Full-time

Re-posted 11 days ago

Apple rating

8.0

Company rating: 8.0 out of 10

Based on 677 frontline employees who took The Breakroom Quiz

7th of 30 rated technology retailers

Job description

Do you love creating sophisticated solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient GPU! You’ll ensure Apple products and services can seamlessly handle the tasks that make them beloved by millions! Joining this group means crafting and building the technology that fuels Apple’s devices. Together, we enable our customers to do all the things they love with their devices. This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to tapeout.
Description
- Work closely with the FE team to understand chip architecture and drive physical aspects early in design cycle.
- Drive outstanding PD construction and optimization recipes for performance, power and Area (PPA).
- Work on pioneering designs in the latest technology nodes.
- Collaborate to drive methodologies and “best known methods” to streamline PD work, come up with guidelines and checklists, drive execution, and supervise progress.
- Drive the work among place and route engineers, set goals and breakthroughs, plan short and long-term work, understand dependencies between different domains like top, STA, block PnR.
- Lead and resolve design and flow issues related to physical design, identify potential solutions and drive execution.
Preferred Qualifications
Masters degree preferred.
We value ability in all aspects of ASIC implementation including Synthesis, DFT insertion, Floorplanning, Clock and Power distribution, Place and Route and all aspects of timing, electrical and physical signoff.
Experience working with EDA tools and exposure to their APIs.
Use design knowledge and innovative physical construction and optimization flows to push performance, power, and Area (PPA) of GPU designs.
Knowledge of multi-voltage, power gated, and power retention concepts will be an advantage.
Practical knowledge with hierarchical design approach, top-down design, budgeting, timing, and physical convergence will be an asset.
Minimum Qualifications
Bachelors degree in Engineering or Computer Science required.
Experience or coursework in one or more of the following areas: physical design, synthesis, DFT or clocking.
Experience or coursework with digital logic design, RTL, CMOS transistor logics or VLSI concepts.
Experience with scripting languages such as TCL, Python, Perl or shell scripting.

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976

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