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Vlsi Dft Jobs (NOW HIRING)

Nvidia Corporation

Senior DFT Engineer

Santa Clara, CA · On-site

$122K - $168K/yr

Co-architect novel DFT strategies alongside VLSI and Product Engineering teams to push the boundaries of silicon test innovation. * Own the full ATPG lifecycle-verification, coverage analysis ...

Siemens AG

$154 - $278/hr

Course work and project experience with VLSI design, HDL Synthesis, VLSI testing and design-for-test (DFT) * Have a deep knowledge and understanding of DFT structures like scan methodology, scan ...

New

Nvidia

Senior DFT Engineer

Santa Clara, CA · Hybrid

$122K - $168K/yr

Co-architect novel DFT strategies alongside VLSI and Product Engineering teams to push the boundaries of silicon test innovation. * Own the full ATPG lifecycle-verification, coverage analysis ...

Nvidia

Senior DFT Engineer

Santa Clara, CA · Hybrid

$122K - $168K/yr

Co-architect novel DFT strategies alongside VLSI and Product Engineering teams to push the boundaries of silicon test innovation. Own the full ATPG lifecycle-verification, coverage analysis, pattern ...

Nvidia

Senior DFT Power Methodology Engineer

Santa Clara, CA · On-site

$122K - $168K/yr

Understanding of fundamental DFT topics and VLSI areas of power, timing & voltage noise * Experience in Power Analysis, Thermal Analysis & IR Drop tools is a plus. * Experience in application of AI ...

Nvidia

Senior DFT Power Methodology Engineer

Santa Clara, CA · On-site

$122K - $168K/yr

Understanding of fundamental DFT topics and VLSI areas of power, timing & voltage noise * Experience in Power Analysis, Thermal Analysis & IR Drop tools is a plus. * Experience in application of AI ...

Nvidia

DFT Engineer - New College Grad

Santa Clara, CA · On-site

$145K - $191K/yr

We are now looking for a highly motivated DFT Engineer to join this multifaceted and innovative ... Work with NVIDIA VLSI and Operations teams to deliver the scan feature in all product segments at ...

Nvidia

DFT Engineer - New College Grad

Santa Clara, CA · On-site

$145K - $191K/yr

We are now looking for a highly motivated DFT Engineer to join this multifaceted and innovative ... Work with NVIDIA VLSI and Operations teams to deliver the scan feature in all product segments at ...

Nvidia Corporation

Senior DFT Engineer

Santa Clara, CA · On-site

$122K - $168K/yr

... design, verification, CAD, VLSI, SW development, and Operations teams to productize new ... DFT or related domains * Demonstrated knowledge and expertise in defining scan test plans, BIST ...

Nvidia

Senior DFT Engineer

Santa Clara, CA · Hybrid

$122K - $168K/yr

... design, verification, CAD, VLSI, SW development, and Operations teams to productize new ... DFT or related domains * Demonstrated knowledge and expertise in defining scan test plans, BIST ...

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How much do vlsi dft jobs pay per hour?

As of Sep 4, 2026, the average hourly pay for vlsi dft in the United States is $31.52, according to ZipRecruiter salary data. Most workers in this role earn between $25.72 and $35.34 per hour, depending on experience, location, and employer.

What is a VLSI DFT?

A VLSI DFT (Design for Test) job involves designing and implementing testability features in integrated circuits to ensure efficient manufacturing testing and fault detection. Engineers work on techniques like scan chains, built-in self-test (BIST), boundary scan, and automatic test pattern generation (ATPG) to improve chip test coverage and reliability. Their role helps identify manufacturing defects and optimize testing costs while ensuring high-quality silicon.

What are the key skills and qualifications needed to thrive in the VLSI DFT position, and why are they important?

To thrive as a VLSI DFT (Design-for-Test) engineer, you need a solid background in digital design, test methodologies, and a relevant degree such as Electrical or Electronics Engineering. Proficiency with EDA tools like Synopsys DFT Compiler, Tessent, or Cadence, along with a good understanding of scripting languages and industry-standard protocols, is typically required. Strong problem-solving abilities, attention to detail, and effective communication are vital soft skills in this role. These competencies are crucial for designing efficient, testable chips and collaborating with cross-functional teams to ensure product quality and manufacturability.

What are some typical challenges faced by VLSI DFT engineers, and how can candidates best prepare for them?

VLSI DFT engineers often encounter challenges such as optimizing test coverage without impacting design performance, managing test data volume, and integrating test features into complex chip designs. Staying up-to-date with evolving industry standards and tools, along with strong analytical skills, can help overcome these hurdles. Candidates can best prepare by gaining hands-on experience with leading DFT tools, understanding scan insertion and ATPG methodologies, and collaborating closely with design and verification teams. Emphasizing continuous learning and adaptability will set you up for long-term success in this dynamic and highly technical field.

Are VLSI DFT engineers in demand?

VLSI DFT (Design for Test) engineers are in high demand due to the increasing complexity of integrated circuits and the need for efficient testing solutions. Skills in hardware design, verification, and test automation tools like Synopsys or Cadence enhance job prospects in this field.

Is Vlsi Dft a good career?

VLSI DFT (Design for Testability) is a specialized field within semiconductor design that focuses on making integrated circuits easier to test and verify. It offers good career prospects due to the growing demand for advanced chip design, and requires skills in digital design, testing methodologies, and EDA tools. The role typically involves working in a fast-paced environment with opportunities for growth in the semiconductor industry.
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Vlsi Dft jobs near you
Infographic showing various Vlsi Dft job openings in the United States as of August 2026, with employment types broken down into 97% Full Time, 1% Part Time, and 2% Contract. Highlights an 91% Physical, 5% Hybrid, and 4% Remote job distribution, with an average salary of $65,566 per year, or $31.5 per hour.

Senior Digital VLSI Design Engineer

Broadcom

Fort Collins, CO

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 22 days ago

Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

18th of 161 rated electronics manufacturers

Job description

Please Note:

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2. If you already have a Candidate Account, please Sign-In before you apply.

Job Description:

We are seeking a Senior Digital VLSI Design Engineer with deep expertise in Synthesis, DFT, Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) sign-off for high speed complex IPs to be delivered to the SOC teams.

In this role, you will be the technical authority responsible for defining and enforcing synchronization strategies across complex, multi-clock domains in advanced process nodes. You will own the constraint creation process for synthesis, full-chip CDC/RDC methodology, establishing rigorous constraints and waivers to ensure zero-defect silicon. You will collaborate closely with Architecture and Chip Lead teams to review the testability and DFT design, clocking and reset architectures early in the design cycle, identifying potential metastability or reset-glitch issues before RTL freeze.

The ideal candidate has 8+ years of experience and a mastery of structural and functional verification of crossings using industry-standard tools (e.g., SpyGlass CDC/RDC, Spyglass Lint, JasperGold, or Meridian). Experience with high-speed interfaces such as SerDes, LPDDR5/6, DDR4/5 or HBM, where asynchronous boundaries are critical, is highly desired. As a Senior Engineer, you are expected to mentor the broader design team on Synthesis, DFT, CDC/RDC best practices and drive automated flows to streamline sign-off for multi-site global teams.

Requirements:

  • BSEE required, MSEE/PHD preferred

  • 8+ years of related experience


Compensation and Benefits


The annual base salary range for this position is USD 121,900.00 To USD 195,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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