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Temporary Asic Rtl Design Engineer Jobs in Chicago, IL

Edgehog Trading

Junior FPGA Developer

Chicago, IL · On-site

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Our team spans trading, engineering, and business operations, working together to build and support ... Design, implement, and verify RTL logic in Verilog or SystemVerilog targeting ultra-low-latency ...

Eliyan

Architecture - I/O Architect

Mundelein, IL · On-site

Mentor engineers on protocol implementation, timing constraints, and hierarchical design ... Extremely knowledgeable on RTL-to-GDSII flows, limitations, and flexibilities to improve ...

Jump Trading

Campus FPGA Engineer (Intern)

Chicago, IL · On-site

$250K/yr

Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering

Jump Trading

Campus FPGA Engineer (Intern)

Chicago, IL · On-site

$250K/yr

Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering

Jump Trading

Campus FPGA Engineer (Intern)

Chicago, IL

$250K/yr

Experience with FPGA or other hardware/systems design and development * Experience with RTL (SystemVerilog/Verilog/VHDL) * Previous internship experience in hardware or low-level software engineering

Ventura Solutions LLC

Design Verification Engineer

Chicago, IL · On-site

$45 - $55/hr

  • Medical

  • Dental

  • Retirement

  • PTO

Our client is seeking an experienced Design Verification Engineer to lead the planning, development ... On the staffing side, we help source, screen, and on-board reputable employees to fill temporary ...

Ventura Solutions LLC

Design Verification Engineer

Chicago, IL · On-site

$45 - $55/hr

  • Medical

  • Dental

  • Retirement

  • PTO

Our client is seeking an experienced Design Verification Engineer to lead the planning, development ... On the staffing side, we help source, screen, and on-board reputable employees to fill temporary ...

Ventura Solutions LLC

Design Verification Engineer

Chicago, IL · On-site

$45 - $55/hr

  • Medical

  • Dental

  • Retirement

  • PTO

Our client is seeking an experienced Design Verification Engineer to lead the planning, development ... On the staffing side, we help source, screen, and on-board reputable employees to fill temporary ...

MatrixSpace

FPGA Engineer

Hoffman Estates, IL · Remote

$150K - $200K/yr

Design and develop FPGA architectures and high-throughput data paths for radar sensing systems ... Strong RTL development skills using System Verilog, Verilog, VHDL, HLS, or similar, from ...

EndoSec LLC

FPGA Engineer

Elk Grove Village, IL

$128K - $164K/yr

Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

Qube Research & Technologies

FPGA Engineer

Chicago, IL · On-site

$180K - $280K/yr

We are looking for talented hardware engineers with a track record of achievement in any domain ... Develop RTL on the latest FPGAs with modern design flows * Following through into production ...

Qube Research & Technologies

FPGA Engineer

Chicago, IL · On-site

$180K - $280K/yr

We are looking for talented hardware engineers with a track record of achievement in any domain ... Develop RTL on the latest FPGAs with modern design flows * Following through into production ...

EndoSec LLC

FPGA Engineer

Elk Grove Village, IL

$128K - $164K/yr

Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

IMC B.V.

Graduate Hardware Engineer

Chicago, IL · On-site

$180 - $220/hr

Enhance your knowledge of trading, algorithm complexity, system design, and coding * Work within ... Proficient in SystemVerilog, Verilog, VHDL, or other RTL programming (additional software ...

Eliyan

DFT - Staff DFT Engineer

Mundelein, IL · On-site

As an Eliyan Staff DFT Engineer, you will be working at a fast-paced early-stage startup creating ... at the RTL & gate level * General knowledge of digital and AMS circuit design techniques

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All JobsAsic Rtl Design Engineer JobsTemporary Asic Rtl Design Engineer JobsTemporary Asic Rtl Design Engineer Jobs in Chicago, IL

Temporary Asic Rtl Design Engineer information

See Chicago, IL salary details

$96.8K

$154.7K

$208.1K

How much do temporary asic rtl design engineer jobs pay per year?

As of Aug 15, 2026, the average yearly pay for temporary asic rtl design engineer in Chicago, IL is $154,723.00, according to ZipRecruiter salary data. Most workers in this role earn between $135,500.00 and $185,400.00 per year, depending on experience, location, and employer.

What is the difference between Temporary Asic Rtl Design Engineer vs Temporary FPGA Design Engineer?

AspectTemporary Asic Rtl Design EngineerTemporary FPGA Design Engineer
Primary FocusDesigning RTL code for ASIC chipsDesigning FPGA logic and configurations
Skills & CertificationsVerilog/VHDL, ASIC design flow, simulation toolsVerilog/VHDL, FPGA development tools, synthesis
Work EnvironmentSemiconductor companies, ASIC design teamsFPGA development labs, prototyping environments
Industry UsageUsed in high-volume chip manufacturingUsed for prototyping, testing, and low-volume products

Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Chicago, IL?

The most popular types of Asic Rtl Design Engineer jobs in Chicago, IL are:

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The top searched job categories for Temporary Asic Rtl Design Engineer jobs in Chicago, IL are:

Temporary Asic Rtl Design Engineer jobs near you

Junior FPGA Developer

Edgehog Trading

Chicago, IL • On-site

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 15 days ago

Job description

About us
Edgehog Trading is a proprietary trading firm specializing in electronic options market making. We take a technology-driven approach, designing and operating automated, scalable systems to provide liquidity across markets.
Our team spans trading, engineering, and business operations, working together to build and support the systems that power the firm. We emphasize data-driven decision making, rigorous problem solving, and continuous improvement to navigate complex and evolving markets.
We operate in a highly collaborative environment where ideas can move quickly from concept to implementation, and where individuals are empowered to take ownership and contribute directly to the firm's growth.
What you'll do:
  • Design, implement, and verify RTL logic in Verilog or SystemVerilog targeting ultra-low-latency trading applications
  • Develop simulation testbenches and functional verification environments to validate FPGA designs before hardware deployment
  • Work closely with senior FPGA engineers and the trading infrastructure team to understand latency requirements and translate them into hardware design decisions
  • Run synthesis, place-and-route, and static timing analysis; iterate on designs to meet strict timing constraints
  • Participate in hardware bring-up and on-board debugging, using waveform analysis and other diagnostic tools
  • Use AI tools to accelerate your development workflow - RTL review, testbench generation, debugging, and documentation
  • Grow your understanding of market data protocols (Ethernet, PCIe, exchange feed formats) as they relate to the systems you build

Qualifications and skills:
  • BS or MS in Electrical Engineering, Computer Engineering, or a related field
  • Hands-on experience with RTL design in Verilog or SystemVerilog - coursework, personal projects, or internship experience all count
  • Familiarity with FPGA simulation tools (e.g., ModelSim, QuestaSim, Vivado, Quartus) and the synthesis-to-deployment flow
  • Understanding of digital logic fundamentals: state machines, FIFOs, clock domain crossing, timing constraints
  • Comfort working in a Linux environment; Python, basic C or C++ is a plus
  • Ability and eagerness to incorporate AI tools into your development and debugging workflow
  • A strong desire to learn the HFT domain - no prior finance knowledge required
  • Strong analytical instincts: when something behaves unexpectedly in hardware, you dig until you find it

Why Edgehog:
  • Small team advantage: Direct access to founders and senior team members from day one
  • Ownership early: Manage real P&L and make meaningful impact within your first year
  • Cutting-edge tech: Work with our proprietary models and low-latency trading systems built in-house
  • Tight feedback loops: Monthly 1-on-1s with your mentor, quarterly reviews with leadership
  • Chicago-based: Affordable cost of living, vibrant trading community

Benefits:
  • Comprehensive health, dental, and vision insurance with premiums 100% covered by the firm
  • 401(k) with a 4% company match
  • Unlimited paid time off and sick leave
  • Free lunch, coffee, drinks, and snacks
  • Commuter benefits
  • Monthly happy hours and annual team events

The base salary range for this position is listed below. Base salary represents just one part of overall compensation; all full-time, permanent roles are eligible for a discretionary bonus and benefits, including items in the above list.
The base salary for this role is 100,000 - 175,000 USD per year

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