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Temporary Asic Rtl Design Engineer Jobs in Berkeley, CA

Apple

Sensing & Imaging FPGA Engineer

San Francisco, CA · On-site

$153K - $196K/yr

... RTL design skills Experience with communication interfaces and protocols (I2C, SPI, UART, USB, MIPI, DP, high-speed serial interfaces) Troubleshooting and analytical skills using lab equipment ...

New

Apple

Sensing & Imaging FPGA Engineer

San Francisco, CA · On-site

$153K - $196K/yr

... RTL design skills Experience with communication interfaces and protocols (I2C, SPI, UART, USB, MIPI, DP, high-speed serial interfaces) Troubleshooting and analytical skills using lab equipment ...

New

Apple, Inc.

Sensing & Imaging FPGA Engineer

San Francisco, CA · On-site

$153K - $196K/yr

... RTL design skills Experience with communication interfaces and protocols (I2C, SPI, UART, USB, MIPI, DP, high-speed serial interfaces) Troubleshooting and analytical skills using lab equipment ...

New

Apple

Mixed-Signal Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

All of which is driven by a world-class vertically integrated engineering team, spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration ...

Apple

Mixed-Signal Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

All of which is driven by a world-class vertically integrated engineering team, spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration ...

Cisco

FPGA Hardware Engineer

San Francisco, CA · On-site

$154K - $225K/yr

We design the networking hardware for Enterprises and Service Providers of various sizes, the ... FPGA or ASIC development experience from specification to production. * Experience with Verilog ...

Talencore

Sr. RTL Verification Engineer

Redwood City, CA · On-site

$166K - $203K/yr

We are seeking a Sr. RTL Verification Engineer to join our team in Redwood City to bring the power of generative AI to enhance and speed the design and manufacture of complex semiconductors.

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All JobsAsic Rtl Design Engineer JobsTemporary Asic Rtl Design Engineer JobsTemporary Asic Rtl Design Engineer Jobs in Berkeley, CA

Temporary Asic Rtl Design Engineer information

See Berkeley, CA salary details

$115.1K

$183.9K

$247.3K

How much do temporary asic rtl design engineer jobs pay per year?

As of Aug 16, 2026, the average yearly pay for temporary asic rtl design engineer in Berkeley, CA is $183,905.00, according to ZipRecruiter salary data. Most workers in this role earn between $161,000.00 and $220,400.00 per year, depending on experience, location, and employer.

What is the difference between Temporary Asic Rtl Design Engineer vs Temporary FPGA Design Engineer?

AspectTemporary Asic Rtl Design EngineerTemporary FPGA Design Engineer
Primary FocusDesigning RTL code for ASIC chipsDesigning FPGA logic and configurations
Skills & CertificationsVerilog/VHDL, ASIC design flow, simulation toolsVerilog/VHDL, FPGA development tools, synthesis
Work EnvironmentSemiconductor companies, ASIC design teamsFPGA development labs, prototyping environments
Industry UsageUsed in high-volume chip manufacturingUsed for prototyping, testing, and low-volume products

Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Berkeley, CA?

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Temporary Asic Rtl Design Engineer jobs near you

Sr. FPGA Design & Verification Engineer

Dolby

San Francisco, CA • On-site

$144K - $199K/yr

Full-time

Posted 4 days ago

Job description

Join the leader in entertainment innovation and help us design the future. At Dolby, science meets art, and high tech means more than computer code. As a member of the Dolby team, you'll see and hear the results of your work everywhere, from movie theaters to smartphones. We continue to revolutionize how people create, deliver, and enjoy entertainment worldwide. To do that, we need the absolute best talent. We're big enough to give you all the resources you need, and small enough so you can make a real difference and earn recognition for your work. We offer a collegial culture, challenging projects, and excellent compensation and benefits, not to mention a Flex Work approach that is truly flexible to support where, when, and how you do your best work.
Dolby's consumer entertainment and cinema businesses are bringing Dolby's breakthrough technologies, powering the world's top movies, TV shows, music, games, and live sports to more places around the world across a wider range of consumer experiences and devices.
Join the team behind the world's most advanced cinema technologies, including next-generation cinema servers, audio processors, and HDR projection systems. Our hardware platforms combine sophisticated image processing, real-time signal processing, and high-performance FPGA design to power premium cinema experiences for audiences worldwide.
Overview
Join Dolby's Cinema Engineering team and help shape the future of cinematic entertainment. As a Senior FPGA Engineer, you'll design and verify FPGA-based solutions for next-generation cinema servers, audio processors, and HDR projection systems that power premium movie experiences worldwide. You'll own FPGA IP blocks and subsystem designs, evaluate technical tradeoffs, and contribute to advanced verification environments supporting image and audio processing pipelines.
This role offers the opportunity to work on cutting-edge technology alongside a highly collaborative engineering team, with your work deployed in cinemas around the globe. Using disciplined engineering practices such as coverage-driven verification, design automation, and continuous process improvement, you'll help deliver the quality and reliability that define Dolby's industry-leading cinema products. In return, you'll find meaningful technical challenges, opportunities for professional growth, and a flexible work environment where your contributions have visible impact.
Responsibilities
  • Design, implement, and verify RTL solutions using VHDL, Verilog, and SystemVerilog for FPGA IP blocks and subsystem-level functionality.
  • Develop, enhance, and execute functional testbenches to validate designs, measure coverage, and ensure product robustness.
  • Implement designs on target FPGA devices, create and maintain timing constraints, and drive timing closure for assigned modules.
  • Bring up and debug new hardware platforms, including FPGA programming, device-level validation, and system-level testing.
  • Participate in FPGA and hardware design reviews, providing technical insight, identifying risks, and recommending improvements.
  • Create and maintain technical documentation, architecture specifications, design guidelines, and knowledge-sharing materials.
  • Contribute to simulation, automation, and verification methodologies that support high-quality product development.
  • Collaborate closely with hardware, software, systems, and product engineering teams to solve complex technical challenges.
  • Help maintain engineering excellence by sharing knowledge and providing guidance to teammates when appropriate.

Required Qualifications
  • Master's degree with 2+ years of professional experience, Bachelor's degree with 3+ years of professional experience, or equivalent engineering experience.
  • Strong understanding of RTL design principles and FPGA development methodologies.
  • Proficiency with VHDL, Verilog, and/or SystemVerilog.
  • Experience using RTL simulation and debugging tools such as Questa or ModelSim.
  • Experience with class-based verification methodologies using SystemVerilog.
  • Familiarity with reusable verification environments and coverage-driven verification techniques.
  • Strong debugging, analytical, and problem-solving skills, with the ability to evaluate technical tradeoffs and implementation options.
  • Experience using laboratory equipment such as oscilloscopes and logic analyzers.
  • Experience with scripting and automation tools such as Python, Tcl, shell scripting, or similar technologies.

Preferred Qualifications
  • Knowledge of image processing, image formats, color processing, or audio/video processing pipelines.
  • Experience with MATLAB or similar numerical analysis and modeling environments.
  • Experience developing FPGA solutions for high-performance signal processing, imaging, multimedia, or video applications.

#LI-SW1
The San Francisco/Bay Area base salary range for this full-time position is $137,100 - $188,300, which can vary if outside this location,plus bonus, benefits, and some roles may also include equity. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, competencies, experience, market demands, internal parity, and relevant education or training. Your recruiter can share more about the specific salary range and perks and benefits for your location during the hiring process.
Dolby will consider qualified applicants with criminal histories in a manner consistent with the requirements of San Francisco Police Code, Article 49, and Administrative Code, Article 12
Equal Employment Opportunity:
Dolby is proud to be an equal opportunity employer. Our success depends on the combined skills and talents of all our employees. We are committed to making employment decisions without regard to race, religious creed, color, age, sex, sexual orientation, gender identity, national origin, religion, marital status, family status, medical condition, disability, military service, pregnancy, childbirth and related medical conditions or any other classification protected by federal, state, and local laws and ordinances.

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