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Temporary Asic Rtl Design Engineer Jobs in Berkeley, CA

OpenAI

RTL & Codesign Engineer

San Francisco, CA · On-site

$225K - $445K/yr

About the Role We're looking for a RTL Engineer to design and implement key compute, memory, and interconnect components for our custom AI accelerator. You'll work closely with architecture ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Minimum Qualifications Bachelors ...

Neuralink

Digital IC Design Engineer Intern

Fremont, CA · On-site

$35/hr

We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is ... Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include ...

AttoTude

MMIC Design Engineer

Menlo Park, CA · Remote

We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role ... Understanding tradeoff at the device level for high performance ASIC implementation * Ability to ...

AttoTude

MMIC Design Engineer

Menlo Park, CA · On-site +1

$160K - $250K/yr

We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role ... Understanding tradeoff at the device level for high performance ASIC implementation * Ability to ...

Apple

Mixed-Signal Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

All of which is driven by a world-class vertically integrated engineering team, spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration ...

Apple

Mixed-Signal Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

All of which is driven by a world-class vertically integrated engineering team, spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration ...

Talencore

Sr. RTL Verification Engineer

Redwood City, CA · On-site

$166K - $203K/yr

We are seeking a Sr. RTL Verification Engineer to join our team in Redwood City to bring the power of generative AI to enhance and speed the design and manufacture of complex semiconductors.

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All JobsTemporary Asic Rtl Design Engineer JobsTemporary Asic Rtl Design Engineer Jobs in Berkeley, CA

Temporary Asic Rtl Design Engineer information

See Berkeley, CA salary details

$115.1K

$183.9K

$247.3K

How much do temporary asic rtl design engineer jobs pay per year?

As of Jun 27, 2026, the average yearly pay for temporary asic rtl design engineer in Berkeley, CA is $183,905.00, according to ZipRecruiter salary data. Most workers in this role earn between $161,000.00 and $220,400.00 per year, depending on experience, location, and employer.

What is the difference between Temporary Asic Rtl Design Engineer vs Temporary FPGA Design Engineer?

AspectTemporary Asic Rtl Design EngineerTemporary FPGA Design Engineer
Primary FocusDesigning RTL code for ASIC chipsDesigning FPGA logic and configurations
Skills & CertificationsVerilog/VHDL, ASIC design flow, simulation toolsVerilog/VHDL, FPGA development tools, synthesis
Work EnvironmentSemiconductor companies, ASIC design teamsFPGA development labs, prototyping environments
Industry UsageUsed in high-volume chip manufacturingUsed for prototyping, testing, and low-volume products

Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Berkeley, CA? The most popular types of Asic Rtl Design Engineer jobs in Berkeley, CA are:
What cities near Berkeley, CA are hiring for Temporary Asic Rtl Design Engineer jobs? Cities near Berkeley, CA with the most Temporary Asic Rtl Design Engineer job openings:
Temporary Asic Rtl Design Engineer jobs near you
RTL & Codesign Engineer

RTL & Codesign Engineer

OpenAI

San Francisco, CA • On-site

$225K - $445K/yr

Full-time

This job post has expired 1 day ago. Applications are no longer accepted.

Job description

About the Team
OpenAI's Hardware organization develops silicon and system-level solutions designed for the unique demands of advanced AI workloads. The team is responsible for building the next generation of AI-native silicon while working closely with software and research partners to co-design hardware tightly integrated with AI models. In addition to delivering production-grade silicon for OpenAI's supercomputing infrastructure, the team also creates custom design tools and methodologies that accelerate innovation and enable hardware optimized specifically for AI.
About the Role
We're looking for a RTL Engineer to design and implement key compute, memory, and interconnect components for our custom AI accelerator. You'll work closely with architecture, verification, physical design, and ML engineers to translate AI workloads into efficient hardware structures. This is a hands-on design role with significant ownership across definition, modeling, and implementation.
This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees.
In this role you will:
  • Produce clean, production-quality microarchitecture and RTL for major accelerator subsystems
  • Contribute to architectural studies including performance modeling and feasibility analysis.
  • Collaborate with software, simulator, and compiler teams to ensure hardware/software co-design and workload fit.
  • Partner with DV and PD to ensure functional correctness, timing closure, area/power targets, and clean integration.
  • Build and review performance and functional models to validate design intent.
  • Participate in design reviews, documentation, and bring-up support across the full silicon lifecycle.
You Might Thrive In This Role If You Have:
  • Graduate-level research or industry experience in computer architecture, AI/ML hardware-software co-design, including workload analysis, dataflow mapping, or accelerator algorithm optimization.
  • Expertise writing production-quality RTL in Verilog/SystemVerilog, with a track record of delivering complex blocks to tape-out.
  • Experience developing hardware design models or architectural simulators, ideally for AI/ML or high-performance compute systems.
  • Familiarity with industry-standard design tools (lint, CDC/RDC, synthesis, STA) and methodologies.
  • Ability to work cross-functionally with architecture, ML systems, compilers, and verification teams.
  • Strong problem-solving skills and ability to think across abstraction layers, from algorithms to circuits.
  • Passion for building industry-leading massive-scale hardware systems.

To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.
About OpenAI
OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity.
We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic.
For additional information, please see OpenAI's Affirmative Action and Equal Employment Opportunity Policy Statement.
Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US-based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, adverse and negative relationship with the following job duties, potentially resulting in the withdrawal of a conditional offer of employment: protect computer hardware entrusted to you from theft, loss or damage; return all computer hardware in your possession (including the data contained therein) upon termination of employment or end of assignment; and maintain the confidentiality of proprietary, confidential, and non-public information. In addition, job duties require access to secure and protected information technology systems and related data security obligations.
To notify OpenAI that you believe this job posting is non-compliant, please submit a report through this form. No response will be provided to inquiries unrelated to job posting compliance.
We are committed to providing reasonable accommodations to applicants with disabilities, and requests can be made via this link.
OpenAI Global Applicant Privacy Policy
At OpenAI, we believe artificial intelligence has the potential to help people solve immense global challenges, and we want the upside of AI to be widely shared. Join us in shaping the future of technology.

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