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Substrate Engineer Jobs in Arizona (NOW HIRING)

mercury

Senior Substrate Layout Engineer

Phoenix, AZ

$97K - $134K/yr

In this role, our team is looking for a Senior Substrate Layout Engineer who will lead complex HDI PCB and substrate layout efforts for advanced microelectronic solutions used in aerospace, defense ...

Mercury Systems

Senior Substrate Layout Engineer

Phoenix, AZ · On-site

$97K - $134K/yr

In this role, our team is looking for a Senior Substrate Layout Engineer who will lead complex HDI PCB and substrate layout efforts for advanced microelectronic solutions used in aerospace, defense ...

Intel

Silicon Packaging Design Engineer

Phoenix, AZ · On-site

$135K/yr

The Role and Impact As a Silicon Packaging Design Engineer, you will play a critical role in the ... Conduct substrate fit and routing studies to establish design, performance, and cost tradeoffs.

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Substrate Engineer information

What are some common challenges Substrate Engineers face when working on high-density interconnect (HDI) designs?

Substrate Engineers often encounter challenges related to managing signal integrity, thermal performance, and miniaturization when working with HDI designs. Balancing the need for dense routing with electrical performance can be complex, especially as device sizes shrink and layer counts increase. Collaboration with PCB designers, materials scientists, and manufacturing teams is crucial to address these issues and ensure the substrate meets both design and production requirements. Keeping up with evolving technologies and industry standards is also essential for success in this role.

What is a Substrate Engineer?

A Substrate Engineer is a professional who specializes in designing, developing, and optimizing the underlying frameworks, often referred to as substrates, for electronic devices or software platforms. In the context of electronics, they work with materials and technologies that form the physical base for circuits and chips, ensuring performance, reliability, and manufacturability. In software, especially blockchain, a Substrate Engineer focuses on building and customizing blockchains using the Substrate framework, handling core logic, consensus, and runtime modules. Their role is crucial for creating robust and scalable systems tailored to specific application requirements.

What is the difference between Substrate Engineer vs Semiconductor Process Engineer?

AspectSubstrate EngineerSemiconductor Process Engineer
CredentialsBachelor's or Master's in Materials Science, Electrical Engineering, or related fieldsBachelor's or Master's in Electrical Engineering, Chemical Engineering, or related fields
Work EnvironmentResearch labs, fabrication facilities, semiconductor manufacturing plantsCleanrooms, fabrication facilities, process development labs
Industry UsageSemiconductor manufacturing, electronics, integrated circuitsSemiconductor fabrication, chip production, process optimization
Common Search/ComparisonYesYes

Substrate Engineers focus on developing and optimizing the materials and layers used in semiconductor devices, while Semiconductor Process Engineers work on the overall manufacturing processes to produce chips efficiently. Both roles require similar educational backgrounds and often collaborate within the semiconductor industry, but their specific responsibilities differ in scope and focus.

What are the key skills and qualifications needed to thrive as a Substrate Engineer, and why are they important?

To thrive as a Substrate Engineer, you need a strong background in materials science, semiconductor fabrication, and electrical engineering, often supported by a relevant engineering degree. Familiarity with industry-standard design tools like Cadence or Mentor Graphics, as well as experience with substrate modeling, PCB design, and analysis software, is typically required. Excellent problem-solving skills, attention to detail, and effective communication are crucial soft skills for collaborating across multidisciplinary teams. These qualifications are essential for ensuring high-quality, reliable substrate designs that meet performance, manufacturability, and cost requirements in advanced electronics manufacturing.
What are popular job titles related to Substrate Engineer jobs in Arizona? For Substrate Engineer jobs in Arizona, the most frequently searched job titles are:
What job categories do people searching Substrate Engineer jobs in Arizona look for? The top searched job categories for Substrate Engineer jobs in Arizona are:
Substrate Engineer jobs near you
Senior Substrate Layout Engineer

Senior Substrate Layout Engineer

Mercury Systems

Phoenix, AZ

$97K - $134K/yr

Full-time

Posted 14 days ago

Mercury Systems rating

8.2

Company rating: 8.2 out of 10

Based on 7 frontline employees who took The Breakroom Quiz

36th of 139 rated electronics manufacturers

Job description

Mercury Systems is seeking the best and brightest engineering talent to help us deliver cuttingedge technology for missioncritical aerospace and defense applications, advancing innovation where it matters most.

In this role, our team is looking for a Senior Substrate Layout Engineer who will lead complex HDI PCB and substrate layout efforts for advanced microelectronic solutions used in aerospace, defense, and space systems. You will contribute directly to the design, layout, and optimization of rugged, highdensity microelectronics that operate in the harshest environments with exceptional reliability. This role serves as a technical authority within Mercury's Microsystems business, driving layout excellence, influencing engineering standards, and shaping the technical direction of multiple highimpact programs. Working within Mercury's Integrator Mindset, you will collaborate across sites and disciplines to deliver breakthrough microelectronics that strengthen national security and support onshore trusted manufacturing.

Job Responsibilities:

  • Provide technical leadership focused on highspeed interfaces and highdensity substrate layout techniques, guiding engineering teams to deliver highquality microelectronic solutions
  • Drive the design, layout, and analysis of complex electrical and mechanical systems, including highdensity interposers, substrates, and PCB layouts supporting digital, analog, power, and RF signals across multiple die (primarily flipchip)
  • Manage highspeed, multilayer packaging activities involving HDI structures, blind and buried vias, BGAs, RF routing, and designfortest (DFT) considerations
  • Coordinate development processes to ensure alignment with supplier Design for Manufacturing (DFM) rules and capabilities
  • Create fabrication drawings that accurately represent design intent and collaborate with fabrication suppliers to ensure successful technical transfer
  • Review artwork, drawings, and design artifacts throughout the layout cycle and during final design reviews for fabrication and assembly
  • Support multidisciplinary investigations, feasibility studies, and design trades in collaboration with crossfunctional engineering teams
  • Apply systemsthinking to understand and communicate how design decisions impact the broader system
  • Assist the team beyond specific technical discipline as needed to meet program and organizational goals

Required Qualifications:

  • Bachelor's or higher degree in engineering in electrical or electronics engineering
  • Typically requires a minimum of 4 yearsof experience as a highdensity package layout designer using industrystandard tools
  • Proficiency with Cadence APD+ physical and electrical constraint editors and experience with HDI stackups, blind/buried microvias, and finepitch routing (e.g., 15m/15m to 2m/2m or below)
  • Knowledge of Cadence Constraint Manager
  • Experience with 2.5D devices, interposers, substrates, flipchip, and highend package design
  • Understanding of layout techniques in digital, analog, and/or RF designs
  • Highend package design experience, especially in advanced substrate or interposer designs.
  • Ability to work within a Cadence schematic/netlistdriven layout workflow; experience with CAM tools for manufacturing data validation (CAM350 and Blueprint preferred)
  • Understanding of layout techniques for digital, analog, and RF designs; knowledge of JEDEC and IPC design, fabrication, and assembly specifications
  • Knowledge of electronic packaging techniques and collaboration with mechanical engineering teams to support 3D modeling for fit checks and thermal analyses
  • Working knowledge of JEDEC and IPC design, fabrication, and assembly specifications
  • Experience creating assembly documentation and fabrication deliverables per company and industry standards

"This position requires you to have or obtain a government security clearance. Security clearances may only be granted to U.S. citizens."

Preferred Qualifications:

  • Understanding of signalintegrity fundamentals including impedance, crosstalk, and powerintegrity considerations
  • Knowledge of substrate materials, stackup creation, and packaging architectures
  • Experience with ThroughSilicon Via (TSV) or interposerbased designs ordie stacking
  • Familiarity with Ansys or Cadence simulation tools such asSigrity and Clarity
  • Ability to support electrical engineers with netlisting and componentselection tasks
  • Experience routing highfrequency SERDES or RF interfaces
  • Experience with scripting or automation for layout workflows

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