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Senior Dft Engineer Jobs in Arizona (NOW HIRING)

NXP Semiconductors

Senior DfT Engineer

Chandler, AZ · On-site

$120 - $160/hr

## Senior DfT EngineerApplylocations: Chandler (Office)time type: Full timeposted on: Posted Todayjob requisition id: R-10064841As a DfT engineer, you will join a highly experienced team. Your key ...

NXP Semiconductors

Senior DfT Engineer

Chandler, AZ · On-site

As a DfT engineer, you will join a highly experienced team. Your key responsibilities will be: 1) Closely collaborate with Product Definer, Analog Design Lead, Digital Design Lead, Test Lead, Product ...

Mirafra Technology

DFT Engineer

Tempe, AZ

We are 500+ employees in India and 250+ In US Clear visibility to senior management which helps for constant professional growth Need knowledge of design for test (DFT) structures such as scan chains ...

TIMES MICROWAVE SYSTEMS

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Senior Connector Design Engineer

Mesa, AZ · On-site

$103K - $142K/yr

Under minimal supervision, the Senior Connector Design Engineer will lead the design and ... Expertise with tools such as FMEA, FEA, DFM, DFT and statistical techniques * Strong communication ...

Mercury Systems

Senior Substrate Layout Engineer

Phoenix, AZ · On-site

$97K - $134K/yr

In this role, our team is looking for a Senior Substrate Layout Engineer who will lead complex HDI ... designfortest (DFT) considerations * Coordinate development processes to ensure alignment with ...

mercury

Senior Substrate Layout Engineer

Phoenix, AZ

$97K - $134K/yr

In this role, our team is looking for a Senior Substrate Layout Engineer who will lead complex HDI ... designfortest (DFT) considerations * Coordinate development processes to ensure alignment with ...

Mercury Systems

Senior Substrate Layout Engineer

Phoenix, AZ · On-site

$97K - $134K/yr

In this role, our team is looking for a Senior Substrate Layout Engineer who will lead complex HDI ... test (DFT) considerations * Coordinate development processes to ensure alignment with supplier ...

Renesas Electronics

Senior Digital Engineer

Chandler, AZ · On-site

$133K/yr

... Senior Digital Design Engineer to join our growing hardware development team in Chandler, AZ. In ... Support DFT strategy and implementation, and review test case development. * Assisting with top ...

Renesas Electronics

Senior Digital Engineer

Chandler, AZ · On-site +1

$133K/yr

... Senior Digital Design Engineer to join our growing hardware development team in Chandler, AZ. In ... Support DFT strategy and implementation, and review test case development. * Assisting with top ...

Renesas Electronics

Senior Digital Engineer

Chandler, AZ · On-site +1

$133K/yr

... Senior Digital Design Engineer to join our growing hardware development team in Chandler, AZ. In ... Support DFT strategy and implementation, and review test case development. * Assisting with top ...

ARM

Senior IP Verification Engineer

Chandler, AZ · On-site

$161K - $218K/yr

Our Solution Engineering division is seeking a skilled verification engineer to develop testbenches ... DFT methodologies: RTL testability, scan insertion, OCC In Return: We are proud to have a set of ...

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All JobsDft Engineer JobsSenior Dft Engineer JobsSenior Dft Engineer Jobs in Arizona

Senior Dft Engineer information

See Arizona salary details

$55.4K

$117.9K

$171K

How much do senior dft engineer jobs pay per year?

As of Aug 15, 2026, the average yearly pay for senior dft engineer in Arizona is $117,937.00, according to ZipRecruiter salary data. Most workers in this role earn between $97,400.00 and $133,700.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Senior DFT engineer, and why are they important?

To thrive as a Senior DFT Engineer, you need deep expertise in digital design, test methodologies, and semiconductor fundamentals, typically supported by a degree in electrical or computer engineering and several years of related experience. Proficiency with EDA tools such as Synopsys Tetramax, Mentor Tessent, and scripting languages like Python or TCL is essential, alongside knowledge of industry standards like IEEE 1149.1 (JTAG). Strong analytical thinking, problem-solving abilities, and collaborative communication skills distinguish top performers in this role. These skills ensure robust test coverage, efficient debugging, and successful delivery of complex integrated circuits in high-stakes environments.

What are some common challenges Senior DFT engineers face when integrating DFT methodologies into complex chip designs?

Senior DFT Engineers often encounter challenges such as balancing test coverage with minimal impact on area, performance, and power consumption. Integrating scan chains, boundary scan, and built-in self-test (BIST) requires close collaboration with RTL designers and verification teams to ensure testability features are implemented without introducing timing violations or design bottlenecks. Additionally, maintaining up-to-date knowledge of industry-standard DFT tools and methodologies, and managing tight project timelines while ensuring high-quality deliverables, are ongoing aspects of the role.

What is a Senior DFT engineer?

Senior DFT (Design for Test) Engineers are experienced professionals who specialize in designing and implementing testability features in integrated circuits (ICs) or systems-on-chip (SoCs). Their primary goal is to ensure that chips can be efficiently and thoroughly tested during manufacturing to detect and diagnose defects. They work on techniques such as scan insertion, built-in self-test (BIST), boundary scan, and test compression. Senior DFT Engineers typically collaborate with design, verification, and manufacturing teams to improve test coverage and reduce costs. Their expertise is crucial for delivering high-quality semiconductor products.

What is the difference between Senior Dft Engineer vs Dft Engineer?

AspectSenior Dft EngineerDft Engineer
Required CredentialsBachelor's or Master's in Electronics/Embedded Systems, relevant certificationsBachelor's in Electronics/Embedded Systems, entry-level certifications
Work EnvironmentDesign teams, manufacturing facilities, R&D labsDesign teams, manufacturing facilities
Employer & Industry UsageSemiconductor, electronics manufacturing, automotiveSemiconductor, electronics manufacturing
Common Search & ComparisonYesYes

The main difference between a Senior Dft Engineer and a Dft Engineer lies in experience, responsibilities, and expertise. Senior Dft Engineers typically have more years of experience, lead complex DFT (Design for Test) projects, and mentor junior staff. Dft Engineers are often entry to mid-level professionals focused on executing DFT tasks under supervision. Both roles are vital in electronics manufacturing, but the senior position involves greater leadership and strategic planning.

What are popular job titles related to Senior Dft Engineer jobs in Arizona?

For Senior Dft Engineer jobs in Arizona, the most frequently searched job titles are:

What job categories do people searching Senior Dft Engineer jobs in Arizona look for?

The top searched job categories for Senior Dft Engineer jobs in Arizona are:

Senior Dft Engineer jobs near you

Senior DfT Engineer

NXP Semiconductors

Chandler, AZ • On-site

$120 - $160/hr

Other

Re-posted 5 days ago

Job description

## Senior DfT EngineerApplylocations: Chandler (Office)time type: Full timeposted on: Posted Todayjob requisition id: R-10064841As a DfT engineer, you will join a highly experienced team. Your key responsibilities will be:1) Closely collaborate with Product Definer, Analog Design Lead, Digital Design Lead, Test Lead, Product Engineer, Quality Engineer, Validation Engineer – to identify the superset of requirements for Testability of the chip (Functional mode, Debug mode, ATPG).2) Gain deep understanding on existing and innovative ways to insert DfT for complex analog and mixed-signal IPs, standard Macros (RAM, ROM, NVM, ADC, DAC) and complex digital logic.3) High-quality of RTL design using Verilog and System-Verilog4) Define Verification Plan for the implemented features and write tests, debug and get those passing at Chiptop level DV environment5) Scan insertion, optimization, length balancing, P&R-aware rerouting of chains, Test-Point insertion, ATPG patterns generation, simulation and debug6) Support Test Engineers during debug of patterns on new silicon, and on customer returns7) Participate in Design & Test Review meetings and support the team for DfT 8) Generate comprehensive DfT Architecture & Design documentation and maintain it to match later updates9) Troubleshoot and resolve issues related to DfT throughout the development lifecycle 10) Stay updated with the latest industry trends, tools, and methodologies in DfT design**Job Qualification:*** Master's degree (MSEE) with majority of courses relevant to Digital Design, RTL coding, DfT, Computer Architecture, Digital Verification.* Minimum 3 years of experience in similar role of DfT, Digital Design & Architecture. Seeking 3-8 years total experience for this role* Willing to relocate to Phoenix Metro area (Arizona) and minimum 3 days per week full-day presence in NXP's Chandler office* Excellent on problem-solving, teamwork, planning, organizing, attention to detail and communication skills.More information about NXP in the United States...NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals. #J-18808-Ljbffr

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