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Remote Risc V Jobs (NOW HIRING)

Vorgossos Standard, LLC

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Senior Embedded Systems Engineer (Lead Technical Translator)

Jackson, MS · Remote

$107K - $146K/yr

Remote Part-Time Contract (10-15 hours/week) during Phase I feasibility, with direct full-time ... ARM Cortex-M, RISC-V, or automotive-grade silicon). • ​Technical Focus: Expert-level ...

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Renesas Electronics

Technical IP management

Austin, TX · On-site +1

$115K - $115K/yr

Drive the long-term IP roadmap, ensuring alignment with future technology nodes and market requirements (e.g., RISC-V, NPU, Automotive Networking). Work with remote IP execution reams to streamline ...

Renesas Electronics

Technical IP management

Austin, TX · On-site +1

$115K - $115K/yr

Drive the long-term IP roadmap, ensuring alignment with future technology nodes and market requirements (e.g., RISC-V, NPU, Automotive Networking). Work with remote IP execution reams to streamline ...

Tensordyne

Principal ASIC Architect

Sunnyvale, CA · On-site +1

Headquartered in Sunnyvale, CA, and Munich, Germany, with remote team members across North America ... memory, embedded RISC-V CPU cores, and high speed serial communications with chip-to-chip ...

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How much do remote risc v jobs pay per hour?

As of Jul 10, 2026, the average hourly pay for remote risc v in the United States is $21.50, according to ZipRecruiter salary data. Most workers in this role earn between $18.03 and $22.84 per hour, depending on experience, location, and employer.

How does working remotely impact collaboration and communication for engineers in RISC-V development teams?

Remote RISC-V engineers often collaborate with cross-functional teams spread across different locations and time zones. Effective communication is facilitated through regular virtual meetings, code review platforms, and project management tools. While remote work offers flexibility, it also requires proactive communication and strong documentation skills to ensure design changes and technical decisions are clearly shared. Engineers may need to adapt to asynchronous workflows and be comfortable using collaborative development environments to maintain productivity and alignment within the team.

What are the key skills and qualifications needed to thrive as a Remote RISC-V Engineer, and why are they important?

To thrive as a Remote RISC-V Engineer, you need a strong background in computer architecture, embedded systems, and proficiency in programming languages such as C/C++ and assembly, often supported by a degree in electrical engineering or computer science. Familiarity with RISC-V toolchains, hardware description languages (HDLs) like Verilog or VHDL, and version control systems such as Git is typically required. Excellent problem-solving, self-motivation, and effective remote communication skills help engineers collaborate and resolve complex technical challenges. These skills are critical for efficiently developing and optimizing RISC-V based solutions in distributed work environments.

What is a Remote RISC-V job?

A Remote RISC-V job is a position that involves working with RISC-V, an open-source instruction set architecture, while allowing employees to work from a location outside of a traditional office—typically from home or another remote environment. RISC-V roles can include hardware design, software development, verification, or support for RISC-V-based systems. Remote workers in these jobs often collaborate with global teams using online tools and platforms. This flexibility enables companies to access a wider talent pool and allows professionals to work from anywhere. Remote RISC-V jobs are becoming increasingly popular as the adoption of RISC-V architecture grows.

What is the difference between Remote Risc V vs Remote FPGA Engineer?

AspectRemote Risc VRemote FPGA Engineer
Required CredentialsBachelor's in Computer Engineering, knowledge of RISC-V architectureBachelor's in Electrical Engineering, experience with FPGA design tools
Work EnvironmentSoftware development, embedded systemsHardware design, digital circuit development
Industry UsageEmbedded systems, IoT devices, processor designTelecommunications, aerospace, high-speed data processing

Remote Risc V and Remote FPGA Engineer roles share some technical knowledge but differ mainly in focus: software development versus hardware design. Both are in high demand in tech industries, often requiring similar educational backgrounds, but they serve different functions within embedded and hardware systems.

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What cities are hiring for Remote Risc V jobs? Cities with the most Remote Risc V job openings:
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Remote Risc V jobs near you
Infographic showing various Remote Risc V job openings in the United States as of July 2026, with employment types broken down into 90% Full Time, 7% Part Time, and 3% Contract. Highlights an 40% Physical, 3% Hybrid, and 57% Remote job distribution, with an average salary of $44,724 per year, or $21.5 per hour.

Senior Embedded Systems Engineer (Lead Technical Translator)

Vorgossos Standard, LLC

Jackson, MS • Remote

$107K - $146K/yr

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Posted 22 hours ago

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Job description

Target Job Titles: Senior Embedded Systems Engineer (Lead Technical Translator) Position Type: Remote Part-Time Contract (10–15 hours/week) during Phase I feasibility, with direct full-time conversion to Chief Technology Officer (CTO) upon Phase II prototype authorization. Security Clearance: U.S. Citizenship Required; Clearable for DoD Secret Clearance


Company Overview
​We are an agile, patent-backed, minority-owned defense technology startup focused on cutting-edge autonomous swarm defense. Our entity is actively positioning for a highly leveraged $1,000,000 Phase I capitalization posture (combining federal Phase I R&D funding, pre-arranged private seed placement, and state-level dollar-for-dollar matching programs). We are seeking a high-cognitive technical wordsmith to serve as our lead proposal architect for upcoming Army SBIR topic ARM26BX04-NV008.


Position Summary ​We are seeking a master craftsman of bare-metal firmware to serve as our Lead Technical Translator. You will take our foundational mathematical proofs and map them onto a physical, hardware-in-the-loop (HWIL) constraints framework. You must be comfortable working entirely without hardware floating-point units (FPUs), designing systems that enforce absolute mathematical determinism in communication-denied environments.

​Core Responsibilities • ​Translate proprietary utility patent mathematics (including integer-scaled Markov state transition probability matrices) into strict 16.16 signed fixed-point integer registers. • ​Architect the firmware execution loop to utilize 256-byte static trigonometric lookup tables to resolve coordinate rotations natively within single-cycle ALU constraints. • ​Configure hardware-driven Non-Maskable Interrupt (NMI) pin lines and memory-mapped digital sensing lines to trigger atomic register overwrites within a 3-clock-cycle window. • ​Provide a verifiable resume and sign a contingent Letter of Intent (LOI) to satisfy federal personnel verification gates.

​Required Qualifications • ​Experience: 5+ years of bare-metal C/C++ and Assembly development targeting low-gate-count, supply-chain-secure microcontrollers (ARM Cortex-M, RISC-V, or automotive-grade silicon). • ​Technical Focus: Expert-level understanding of fixed-point math, integer register partitioning, hardware interrupt behaviors, and passive sensory interfaces (CMOS optical flow, SWIR stellar tracking). • ​Industry Background: Direct experience with UAV flight controllers, robotic kinematics, or guidance/navigation/control (GNC) systems.