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Remote Asic Rtl Design Engineer Jobs in Raleigh, NC

Wood Plc

Distribution Engineer (remote)

Raleigh, NC · On-site +1

Reporting to the Manager, Distribution Engineering. This position is a remote position or is a ... Traveling and visiting project sites during design and construction (as required) Skills ...

Wood Plc

Distribution Engineer (remote)

Raleigh, NC · On-site +1

Reporting to the Manager, Distribution Engineering. This position is a remote position or is a ... Traveling and visiting project sites during design and construction (as required) Skills ...

Wood Plc

Distribution Engineer (remote)

Raleigh, NC · On-site +1

Reporting to the Manager, Distribution Engineering. This position is a remote position or is a ... Traveling and visiting project sites during design and construction (as required) Skills ...

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Remote Asic Rtl Design Engineer information

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$91.4K

$146K

$196.4K

How much do remote asic rtl design engineer jobs pay per year?

As of Jul 10, 2026, the average yearly pay for remote asic rtl design engineer in Raleigh, NC is $146,002.00, according to ZipRecruiter salary data. Most workers in this role earn between $127,800.00 and $175,000.00 per year, depending on experience, location, and employer.

What is a Remote ASIC RTL Design Engineer?

A Remote ASIC RTL Design Engineer is a professional who specializes in designing the Register Transfer Level (RTL) code for Application-Specific Integrated Circuits (ASICs) while working remotely. Their main responsibilities include creating and verifying digital circuit designs using hardware description languages such as Verilog or VHDL. These engineers collaborate with hardware teams to ensure functionality, performance, and power requirements are met, all while operating from a location outside of a traditional office setting. They often use remote collaboration tools and simulation software to review and validate designs before fabrication.

What are the key skills and qualifications needed to thrive as a Remote ASIC RTL Design Engineer, and why are they important?

To thrive as a Remote ASIC RTL Design Engineer, you need a solid background in digital design, computer engineering, and hardware description languages like Verilog or VHDL, often supported by a relevant degree. Proficiency with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, as well as experience with simulation, synthesis, and version control systems, is crucial. Strong problem-solving, self-motivation, and effective remote communication skills distinguish top performers in this role. These skills ensure accurate, efficient design cycles and effective collaboration across distributed teams, leading to successful chip delivery.

What is the difference between Remote Asic Rtl Design Engineer vs Remote Digital IC Design Engineer?

AspectRemote Asic Rtl Design EngineerRemote Digital IC Design Engineer
Primary FocusRegister Transfer Level (RTL) design for ASICsDigital integrated circuit design at the IC level
Skills & CertificationsHDL (Verilog/VHDL), EDA tools, verificationHDL, circuit simulation, verification, FPGA experience
Work EnvironmentASIC design teams, hardware developmentIC design teams, semiconductor industry
Industry UsageUsed in ASIC development for various applicationsUsed in digital IC manufacturing and prototyping

Both roles involve digital design and HDL skills, but the Remote Asic Rtl Design Engineer focuses on RTL coding for ASICs, while the Remote Digital IC Design Engineer covers broader digital IC design, including FPGA and chip-level work. They share similar credentials and work environments, often overlapping in semiconductor companies.

What are some common challenges faced by Remote ASIC RTL Design Engineers, and how can they be addressed?

Remote ASIC RTL Design Engineers often face challenges such as coordinating with distributed teams across different time zones and ensuring effective communication during complex design phases. To address these issues, it’s important to establish clear documentation practices, utilize collaboration tools like version control and video conferencing, and schedule regular check-ins with team members. Additionally, staying proactive in seeking feedback and clarifying design specifications helps ensure alignment and reduces misunderstandings. Building strong virtual relationships with verification and backend teams can also streamline the handoff process and overall project flow.
What are the most commonly searched types of Asic Rtl Design Engineer jobs in Raleigh, NC? The most popular types of Asic Rtl Design Engineer jobs in Raleigh, NC are:
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Remote Asic Rtl Design Engineer jobs near you
Infographic showing various Remote Asic Rtl Design Engineer job openings in Raleigh, NC as of July 2026, with employment types broken down into 87% Full Time, 7% Part Time, 1% Temporary, 3% Contract, and 2% Summer. Highlights an 89% Physical, 6% Hybrid, and 5% Remote job distribution, with an average salary of $146,002 per year, or $70.2 per hour.

Principal Engineer, Design Verification

Analogdevices

Durham, NC • On-site, Remote

$131K/yr

Full-time

Re-posted 11 days ago

Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ:ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more atwww.analog.comand onLinkedInandTwitter (X).

Principal Engineer, Design Verification

The Data Center and Energy team is seeking a highly experienced Principal Design Verification Engineer to provide strategic leadership and technical direction across our Power Controller BU portfolio at ADI's Durham, NC facility. As a technical leader, the candidate will lead a small team of verification engineers while driving DV strategy, methodology innovation, and execution excellence across multiple projects. This role combines hands-on technical expertise with leadership responsibilities, requiring the candidate to define and implement state-of-the-art verification methodologies, mentor team members, and ensure verification quality across the entire product portfolio.

Analog Devices offers a Flexible Work policy which includes remote work days and alternative schedule options.

Key Responsibilities

- Define and implement the DV strategy for the group, ensuring alignment with business objectives and product roadmaps

- Develop comprehensive DV plans for multiple projects as required

- Drive adoption of state-of-the-art DV methodologies including advanced UVM architectures, formal verification, portable stimulus (PSS), and AI/ML-assisted verification techniques

- Establish verification metrics, KPIs, and quality gates to measure verification progress and coverage closure

- Lead and mentor a small team of design verification engineers, providing technical guidance and career development support

- Conduct code reviews, testbench architecture reviews, and methodology assessments

- Collaborate on recruiting, interviewing, and onboarding new verification talent

- Architect scalable, reusable verification infrastructure across multiple projects and product generations

- Drive evaluation and adoption of new EDA tools, verification IP, and emerging methodologies

- Lead development of advanced testbench components including UVM environments, formal verification approaches, and mixed-signal verification solutions

- Support all projects across the portfolio with DV planning, execution oversight, and technical problem-solving

- Partner with analog and digital design teams to ensure seamless integration and verification of mixed-signal designs

- Interface with product engineering, applications, and silicon validation teams

- Represent the verification team in project reviews, design reviews, and executive briefings

- Develop and document best practices, guidelines, and playbooks for the verification organization

- Stay current with industry trends and drive adoption of relevant innovations

Minimum Qualifications

- Bachelor's or Master's degree in Electrical or Computer Engineering

- 10+ years of hands-on experience in SystemVerilog/UVM-based verification

- 3+ years of technical leadership experience, including mentoring engineers, leading verification efforts on complex projects, or managing small teams

- Demonstrated experience architecting verification environments for complex mixed-signal SoCs or power management ICs

- Proven track record of defining and implementing DV strategies across multiple concurrent projects

- Expert-level proficiency in EDA tools and automation (Python, TCL, Perl, Shell) for building verification infrastructure and flows

- Experience with formal verification methodologies and tools (JasperGold, VC Formal, or equivalent)

- Strong understanding of coverage-driven verification, including functional coverage modeling and closure strategies

- Excellent communication skills with the ability to present technical content to diverse audiences, including executives

Preferred Qualifications

- Experience with portable stimulus standard (PSS) and graph-based verification approaches

- Deep knowledge of analog/mixed-signal verification techniques including SV-RNM modeling

- Experience with verification of ARM/RISC-V based sub-systems or complex SoCs

- Expertise in power management IC verification, including multiphase DC-DC controllers, voltage regulators, and power sequencing

- Experience with voltage interface protocols such as PMBUS, AVS, SVID, SVI3, I2C, SPI

- Knowledge of emulation and FPGA prototyping methodologies for early software enablement

- RTL design experience providing strong design-for-verification perspective

- Experience building and scaling verification teams or capabilities

- Track record of driving process improvements that measurably improved verification quality or efficiency

- AI/ML tools for verification - keen interest and experience leveraging AI for coverage closure, test generation, debug, or productivity improvements

- Proficiency with multiple verification platforms (Cadence, Synopsys, Mentor/Siemens)

- Experience with continuous integration/continuous verification (CI/CV) pipelines

- Familiarity with cloud-based verification and distributed simulation/regression management

- Version control expertise (Git, Perforce) and collaborative development workflows

- Verilog, C/C++, SystemC for modeling and verification

- Strong analytical and debug skills with ability to drive complex issues to resolution

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

EEO is the Law: Notice of Applicant Rights Under the Law.

Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days

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