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Internship Remote Design Verification Engineer Jobs in Raleigh, NC

Sr. Engineer - Design Services

Durham, NC ยท On-site +1

$77.51K - $120.13K/yr

... Full time with benefits Remote Employment: Flexible/Hybrid Job Number: 26-05796 Department ... Experience with direction of helpers, assistants, seasonal employees, interns, or temporary ...

Reporting to the Manager, Distribution Engineering. This position is a remote position or is a ... Traveling and visiting project sites during design and construction (as required) Skills ...

Reporting to the Manager, Distribution Engineering. This position is a remote position or is a ... Traveling and visiting project sites during design and construction (as required) Skills ...

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Internship Remote Design Verification Engineer information

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How much do internship remote design verification engineer jobs pay per hour?

As of May 29, 2026, the average hourly pay for internship remote design verification engineer in Raleigh, NC is $18.84, according to ZipRecruiter salary data. Most workers in this role earn between $14.04 and $21.01 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an Internship Remote Design Verification Engineer, and why are they important?

To succeed as an Internship Remote Design Verification Engineer, you need a solid understanding of digital design concepts, logic circuits, and proficiency in hardware description languages like Verilog or VHDL, often gained through coursework or related internships. Familiarity with simulation tools (such as ModelSim or Synopsys VCS) and version control systems is typically required, and knowledge of scripting languages like Python or TCL is a plus. Strong analytical thinking, effective communication, and attention to detail are crucial soft skills for collaborating with remote teams and identifying design issues. These skills enable accurate verification, efficient teamwork, and the delivery of reliable hardware solutions in a distributed work environment.

What are some common challenges faced by remote design verification engineering interns, and how can they overcome them?

Remote design verification engineering interns often face challenges such as limited face-to-face mentorship, time zone differences, and communication barriers with team members. To overcome these, it's important to proactively schedule regular check-ins with mentors, make use of collaborative tools (like Slack or Zoom), and document questions or issues clearly before reaching out for help. Staying organized and setting clear daily or weekly goals can also help interns stay on track and maximize their learning experience in a remote environment.

What does an Internship Remote Design Verification Engineer do?

An Internship Remote Design Verification Engineer assists in verifying and validating the functionality of hardware designs, typically for integrated circuits or systems on chip (SoC). Working remotely, they collaborate with engineering teams to develop test plans, create simulation environments, and run verification tests to ensure designs meet required specifications. Interns in this role learn industry-standard verification methodologies such as UVM and tools like SystemVerilog, and contribute to debugging and documenting design issues. The role provides practical experience in hardware design, verification processes, and remote teamwork within the semiconductor industry.

What is the difference between Internship Remote Design Verification Engineer vs Internship Remote Test Engineer?

AspectInternship Remote Design Verification EngineerInternship Remote Test Engineer
Primary FocusVerifying hardware or chip designs against specificationsTesting software or hardware products for functionality and performance
Required SkillsHardware design, verification methodologies, scriptingTesting procedures, scripting, debugging
Work EnvironmentDesign labs, remote collaboration with design teamsTesting labs, remote testing environments
Common Industry UsageSemiconductor, electronics companiesSoftware, electronics, consumer electronics companies

While both roles involve testing and verification, the Design Verification Engineer focuses on ensuring hardware or chip designs meet specifications, whereas the Test Engineer emphasizes testing products for functionality. Internships in both areas provide valuable experience in verification and testing processes within the tech industry.

What are popular job titles related to Internship Remote Design Verification Engineer jobs in Raleigh, NC? For Internship Remote Design Verification Engineer jobs in Raleigh, NC, the most frequently searched job titles are:
What job categories do people searching Internship Remote Design Verification Engineer jobs in Raleigh, NC look for? The top searched job categories for Internship Remote Design Verification Engineer jobs in Raleigh, NC are:
What cities near Raleigh, NC are hiring for Internship Remote Design Verification Engineer jobs? Cities near Raleigh, NC with the most Internship Remote Design Verification Engineer job openings:

Principal Engineer, Design Verification

Analogdevices

Durham, NC โ€ข On-site, Remote

$131.40K/yr

Full-time

Posted 29 days ago


Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ:ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more atwww.analog.comand onLinkedInandTwitter (X).

Principal Engineer, Design Verification

The Data Center and Energy team is seeking a highly experienced Principal Design Verification Engineer to provide strategic leadership and technical direction across our Power Controller BU portfolio at ADI's Durham, NC facility. As a technical leader, the candidate will lead a small team of verification engineers while driving DV strategy, methodology innovation, and execution excellence across multiple projects. This role combines hands-on technical expertise with leadership responsibilities, requiring the candidate to define and implement state-of-the-art verification methodologies, mentor team members, and ensure verification quality across the entire product portfolio.

Analog Devices offers a Flexible Work policy which includes remote work days and alternative schedule options.

Key Responsibilities

- Define and implement the DV strategy for the group, ensuring alignment with business objectives and product roadmaps

- Develop comprehensive DV plans for multiple projects as required

- Drive adoption of state-of-the-art DV methodologies including advanced UVM architectures, formal verification, portable stimulus (PSS), and AI/ML-assisted verification techniques

- Establish verification metrics, KPIs, and quality gates to measure verification progress and coverage closure

- Lead and mentor a small team of design verification engineers, providing technical guidance and career development support

- Conduct code reviews, testbench architecture reviews, and methodology assessments

- Collaborate on recruiting, interviewing, and onboarding new verification talent

- Architect scalable, reusable verification infrastructure across multiple projects and product generations

- Drive evaluation and adoption of new EDA tools, verification IP, and emerging methodologies

- Lead development of advanced testbench components including UVM environments, formal verification approaches, and mixed-signal verification solutions

- Support all projects across the portfolio with DV planning, execution oversight, and technical problem-solving

- Partner with analog and digital design teams to ensure seamless integration and verification of mixed-signal designs

- Interface with product engineering, applications, and silicon validation teams

- Represent the verification team in project reviews, design reviews, and executive briefings

- Develop and document best practices, guidelines, and playbooks for the verification organization

- Stay current with industry trends and drive adoption of relevant innovations

Minimum Qualifications

- Bachelor's or Master's degree in Electrical or Computer Engineering

- 10+ years of hands-on experience in SystemVerilog/UVM-based verification

- 3+ years of technical leadership experience, including mentoring engineers, leading verification efforts on complex projects, or managing small teams

- Demonstrated experience architecting verification environments for complex mixed-signal SoCs or power management ICs

- Proven track record of defining and implementing DV strategies across multiple concurrent projects

- Expert-level proficiency in EDA tools and automation (Python, TCL, Perl, Shell) for building verification infrastructure and flows

- Experience with formal verification methodologies and tools (JasperGold, VC Formal, or equivalent)

- Strong understanding of coverage-driven verification, including functional coverage modeling and closure strategies

- Excellent communication skills with the ability to present technical content to diverse audiences, including executives

Preferred Qualifications

- Experience with portable stimulus standard (PSS) and graph-based verification approaches

- Deep knowledge of analog/mixed-signal verification techniques including SV-RNM modeling

- Experience with verification of ARM/RISC-V based sub-systems or complex SoCs

- Expertise in power management IC verification, including multiphase DC-DC controllers, voltage regulators, and power sequencing

- Experience with voltage interface protocols such as PMBUS, AVS, SVID, SVI3, I2C, SPI

- Knowledge of emulation and FPGA prototyping methodologies for early software enablement

- RTL design experience providing strong design-for-verification perspective

- Experience building and scaling verification teams or capabilities

- Track record of driving process improvements that measurably improved verification quality or efficiency

- AI/ML tools for verification - keen interest and experience leveraging AI for coverage closure, test generation, debug, or productivity improvements

- Proficiency with multiple verification platforms (Cadence, Synopsys, Mentor/Siemens)

- Experience with continuous integration/continuous verification (CI/CV) pipelines

- Familiarity with cloud-based verification and distributed simulation/regression management

- Version control expertise (Git, Perforce) and collaborative development workflows

- Verilog, C/C++, SystemC for modeling and verification

- Strong analytical and debug skills with ability to drive complex issues to resolution

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

EEO is the Law: Notice of Applicant Rights Under the Law.

Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days