ZipRecruiter

Log In

1

Dft Engineer Jobs in Raleigh, NC (NOW HIRING)

Microsoft

Senior Physical Design Engineer

Raleigh, NC · On-site

$101K - $139K/yr

Experience and knowledge on Synthesis, RTL / DFT feedback , Timing Constraints. * Responsible for ... Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND ...

Nvidia

Senior ASIC Timing Engineer

Durham, NC · On-site

NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding ... Understanding of DFT logic and experience with DFT timing closure for various modes e.g., scan ...

Ampere Computing LLC

Circuit Design Engineer

Durham, NC · On-site

$147K - $220K/yr

You will also collaborate with cross-functional teams including logic, DFT, and PD to translate ... Electrical or Computer Engineering - Bachelor's degree & 5 years of related experience; or MS ...

Apple

RTL Design Engineer

Cary, NC · On-site

You will work with a variety of flows fundamental to modern silicon engineering: modeling and ... DFT Proven knowledge of SystemVerilog assertions, checkers, and other design verification ...

Nvidia

Senior ASIC Timing Engineer

Durham, NC · Hybrid

We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... Understanding of DFT logic and experience with DFT timing closure for various modes e.g., scan ...

Recruiting Engine (MLS)

Senior Mechanical Engineer

Apex, NC

$80K - $105K/yr

... Test (DFT) practices Preferred Qualifications: Experience designing waterproof and corrosion ... usability engineering Experience developing and iterating on industrial design concepts for ...

Apply Early

MLS Technologies

Senior Mechanical Engineer

Apex, NC · On-site

$80K - $105K/yr

... Test (DFT) practices Preferred Qualifications: Experience designing waterproof and corrosion ... usability engineering Experience developing and iterating on industrial design concepts for ...

MLS Technologies

Senior Mechanical Engineer

Apex, NC · On-site

$80K - $105K/yr

... Test (DFT) practices Preferred Qualifications: Experience designing waterproof and corrosion ... usability engineering Experience developing and iterating on industrial design concepts for ...

next page

Showing results 1-20

All JobsDft Engineer JobsDft Engineer Jobs in Raleigh, NC

Dft Engineer information

See Raleigh, NC salary details

$71K

$125.9K

$242K

How much do dft engineer jobs pay per year?

As of Jul 3, 2026, the average yearly pay for dft engineer in Raleigh, NC is $125,895.00, according to ZipRecruiter salary data. Most workers in this role earn between $100,100.00 and $130,700.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a DFT Engineer, and why are they important?

To thrive as a DFT (Design for Test) Engineer, you need a solid background in electrical engineering, digital design, and ASIC/FPGA development, often supported by a relevant degree. Familiarity with test methodologies, scan insertion tools (such as Synopsys DFT Compiler or Mentor Tessent), and scripting languages like Perl or Python is typically required. Strong problem-solving skills, attention to detail, and effective communication help DFT Engineers collaborate with design and verification teams to resolve complex testability challenges. These competencies are essential to ensure high-quality, testable silicon designs that minimize defects and streamline manufacturing processes.

What is the difference between Dft Engineer vs Test Engineer?

AspectDft EngineerTest Engineer
Required CredentialsBachelor's in Electronics, Electrical, or related fields; certifications in DFT techniquesBachelor's in Electronics, Electrical, Computer Science; certifications in testing methodologies
Work EnvironmentDesign and implementation of DFT strategies during IC developmentTesting, validation, and debugging of electronic products and systems
Employer & Industry UsageSemiconductor companies, IC design firmsConsumer electronics, automotive, telecommunications industries

While both Dft Engineers and Test Engineers work in electronics and semiconductor industries, Dft Engineers focus on designing testability features during chip development, whereas Test Engineers execute testing and validation of finished products. Their roles complement each other, but their daily tasks and expertise areas differ significantly.

Is DFT engineering a good career?

DFT (Design for Test) engineering is a specialized field within semiconductor and integrated circuit design, focusing on ensuring manufacturability and testability of chips. It offers steady demand due to the ongoing need for quality and reliability in electronics, and requires skills in digital design, verification, and tools like EDA software. Career growth depends on industry trends and technical expertise, often involving certifications and continuous learning.

What engineers make $500,000?

Senior engineers in specialized fields such as petroleum, aerospace, or software engineering with extensive experience and advanced skills can earn $500,000 or more annually. High compensation often involves leadership roles, bonuses, stock options, or working in high-demand industries with complex projects.

How much do DFT engineers make?

Design for Test (DFT) engineers typically earn between $80,000 and $130,000 annually, depending on experience, location, and industry. Senior DFT engineers with specialized skills in automation and verification can earn higher salaries, often exceeding $150,000. Compensation may also include bonuses and benefits related to their expertise in integrated circuit testing and design validation.

What does a DFT engineer do?

A DFT (Design for Test) engineer designs and implements test strategies and methodologies to ensure integrated circuits and electronic devices are functional and defect-free. They develop test plans, create test patterns, and work with CAD tools to improve test coverage and manufacturability, often collaborating with design and manufacturing teams. Proficiency in scripting, testing tools, and industry standards is essential for this role.

What are some common challenges faced by DFT Engineers during the silicon validation phase, and how can these be addressed?

DFT Engineers often encounter challenges during the silicon validation phase, such as discrepancies between simulation results and actual silicon behavior, limited access to internal nodes, and diagnosing scan chain failures. These issues can be addressed by thorough pre-silicon verification, incorporating robust test points, and leveraging advanced diagnostic tools and methodologies. Effective collaboration with design and validation teams is also crucial to quickly resolve issues and implement necessary design changes, ensuring high test coverage and product reliability.

What are DFT Engineers?

DFT Engineers, or Design for Test Engineers, are professionals who specialize in designing and implementing test structures and methodologies within integrated circuits (ICs) to ensure their testability and reliability during manufacturing. Their work enables efficient detection and diagnosis of faults in chips, helping to improve yield and reduce production costs. DFT Engineers collaborate closely with design, verification, and manufacturing teams to integrate features such as scan chains, built-in self-test (BIST), and boundary scan into chip designs. Their expertise is crucial for modern semiconductor development, especially as chips become increasingly complex.
What are the most commonly searched types of Dft Engineer jobs in Raleigh, NC? The most popular types of Dft Engineer jobs in Raleigh, NC are:
What are popular job titles related to Dft Engineer jobs in Raleigh, NC? For Dft Engineer jobs in Raleigh, NC, the most frequently searched job titles are:
What job categories do people searching Dft Engineer jobs in Raleigh, NC look for? The top searched job categories for Dft Engineer jobs in Raleigh, NC are:
What cities near Raleigh, NC are hiring for Dft Engineer jobs? Cities near Raleigh, NC with the most Dft Engineer job openings:
Dft Engineer jobs near you
Principal Engineer - Design For Test (DFT)

Principal Engineer - Design For Test (DFT)

Marvell

Morrisville, NC

Full-time

Life, Retirement

Posted 10 days ago

Job description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As a Digital IC Design Principal Engineer with Marvell, you'll be a member of the Custom Silicon Engineering team. This team is a leader in large multi-die designs that drive high compute performance and acceleration in many markets, including custom AI, 5G and 6G. The role will be challenging and will require an experienced DFT engineer that can work with existing DFT solutions while also creating new solutions to address industry first issues.

What You Can Expect

The position will be responsible for implementing DFT/Test on complex IP and SOC for multiple custom/compute ASIC/SoC designs. The work will involve running Tessent tools for insertion of all DFT structures. The role will involve chiplet DFT solutions, will include Tessent SSN, and will require strong verification and debug skills.

  • The engineer will need to show proficiency in ICL/PDL, PTAP/STAP, 1687. It is a requirement that the engineer is knowledgeable in instrument-level access inside a chip.
  • The engineer will work with other leads to help with Design-for-Test architecture definition and implementation of additional DFT/DFX features
  • The engineer will also be involved in STA constraint definition, pattern generation & post-silicon bring-up and debug.
  • In this position, the responsibility will grow to include mentoring, guiding and driving a small team of DFT engineers.
  • The engineer will work with other leads to help enhance DFT methodologies and tools.

What We're Looking For

  • Bachelor's, Master's degree or PhD in Computer Science, Electrical Engineering or related fields with minimum of 10 years of work experience.
  • Direct DFT experience with at least 8 years in the custom chip (ASIC) design business
  • Hands-on working experience in various stages of DFT-Execution: SCAN/MBIST/Validation/STA/IP-DFX/Post-Silicon Bring-up/Debug
  • Thorough knowledge on various DFT/Test architecture solutions for 2.5D/3D IC design.
  • Strong fundamentals in digital circuit design and logic design
  • Understanding of DFT flows and methodologies and experience with Siemens/Synopsys Tool set (Tessent, Spyglass/Tmax, Genus, Modus, NCSim/DC), with Tessent the EDA tool flow in use.
  • Proven track record of problem solving and innovation to meet challenging design requirements.
  • Excellent team player and can work with different function leaders, across different geographies to define and execute the DFT project to completion.
  • Excellent communications skills both verbal and written.
  • Scripting skills using Python, PERL, Tcl and C-Shell is plus.

Expected Base Pay Range (USD)

160,400 - 237,320, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

#LI-AO1

Apply