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Remote Asic Physical Design Engineer Jobs in California

Design Engineer

San Francisco, CA · On-site +1

$220K - $350K/yr

Without design engineers as influential voices in the company, none of this would be possible. And ... We fly remote teammates to SF for three to four days a month. Visa sponsorship. We sponsor visas:

Integrate robotic and remote handling technologies (e.g., manipulators, cameras, cranes, etc.) into ... We are looking for a Hot Cell Design Engineer that is: * Passionate about clean energy, fuel ...

Integrate robotic and remote handling technologies (e.g., manipulators, cameras, cranes, etc.) into ... We are looking for a Hot Cell Design Engineer that is: * Passionate about clean energy, fuel ...

US - Remote Job Title: Core Engineering - Design Engineer V PCB Layout Engineer, AR Product Team As a PCB Layout Engineer on Meta's AR Product Team, you will be responsible for driving world-class ...

Showing results 21-40

Remote Asic Physical Design Engineer information

What does a remote ASIC physical design engineer do?

A Remote ASIC Physical Design Engineer is responsible for transforming circuit designs into physical layouts that can be manufactured as integrated circuits (ICs), specifically Application-Specific Integrated Circuits (ASICs). Their role includes tasks such as floorplanning, placement, routing, timing analysis, and verifying that the physical design meets performance and power specifications. Working remotely, they collaborate with design and verification teams using specialized EDA (Electronic Design Automation) tools to optimize chip layouts for manufacturability and efficiency. Effective communication and expertise in physical design processes are essential for success in this role.

What are the key skills and qualifications needed to thrive as a remote ASIC physical design engineer?

To thrive as a Remote ASIC Physical Design Engineer, you need a strong background in digital logic design, ASIC implementation, and a relevant engineering degree. Proficiency with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, as well as scripting languages like TCL and Python, is typically required. Excellent problem-solving, communication, and time management skills are vital for effective remote collaboration and project delivery. These skills and qualifications ensure high-quality chip designs, efficient workflow, and seamless teamwork in a distributed environment.

What are some common challenges faced by a remote ASIC physical design engineer, and how can they be addressed?

Remote ASIC Physical Design Engineers often encounter challenges related to communication and collaboration, especially when coordinating with cross-functional teams such as verification, synthesis, and EDA tool support. Time zone differences and limited face-to-face interaction can make it harder to quickly resolve design issues or clarify specifications. To overcome these challenges, engineers should leverage collaborative tools, maintain clear documentation, and proactively schedule regular check-ins with team members. Building strong virtual communication habits helps ensure smooth project execution and timely delivery of design milestones.

What job categories do people searching Remote Asic Physical Design Engineer jobs in California look for?

The top searched job categories for Remote Asic Physical Design Engineer jobs in California are:

What cities in California are hiring for Remote Asic Physical Design Engineer jobs?

Cities in California with the most Remote Asic Physical Design Engineer job openings:

Infographic showing various Remote Asic Physical Design Engineer job openings in California as of August 2026, with employment types broken down into 85% Full Time, 5% Part Time, and 10% Contract. Highlights an 100% Remote job distribution.

Sr. Manager Silicon Design Engineering

Advanced Micro Devices, Inc

Santa Clara, CA • On-site, Remote

Full-time

Posted 4 days ago


Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

27th of 159 rated electronics manufacturers


Job description


ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.

AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.



Job Role and Responsibility: AMD, Inc., is hiring Sr. Manager Silicon Design Engineering to Develop and establish timing closure methodologies and strategies for SoC and IP blocks to ensure compliance with requirements and provide technical guidance to execution teams. Oversee STA closure for complex SoC designs featuring chiplet and 3D stack interfaces. Leverage extensive knowledge and experience in physical design and full-chip timing to tackle large, cutting-edge designs, ensuring high-quality, on time delivery.  Understand the SoC as an integrated system while optimizing for performance and power. Collaborate cross-functionally with IP, Domain, CAD, and Methodology teams to identify and address intricate technical challenges and risks, and create solutions to meet product specifications. Share knowledge and contribute to various SoC functions. As the overall STA and clocking lead, take responsibility for architectural analysis and the scoping/assessment of feature changes. Partner closely with design teams to refine clocking, area and floorplan, set timing targets, and secure performance sign-offs. Assist Post-Silicon teams with debugging and resolving timing issues. Utilize knowledge of computers and electronics, including circuit boards, processors, chips, and electronic equipment, as well as knowledge of design techniques, tools, and principles. Apply knowledge of engineering principles, best practices, and technologies to the design, development, and testing of various company proprietary products.

Can work remotely.

Supervises.

Multiple openings.  Qualified applicants click “APPLY NOW” button to apply online.

Travel required: NO     

Qualifications: Degree required

Master’s degree or foreign equivalent in Electronics Engineering, Computer Science, Computer Engineering, or Electrical Engineering or related field.

Qualifications: Amount and type of experience required: Four (4) years of experience in the job offered or a closely related engineering role.

Alternate combination of education and experience: Employer will alternatively accept a Bachelor’s degree or foreign equivalent in Electronics Engineering, Computer Science, Computer Engineering, or Electrical Engineering or related field and six (6) years of experience in the job offered or a closely related engineering role.

Specific skills required: The following skills are required:

Position requires four (4) years of experience in the following:

  • Using Computer-Aided Design (CAD) tools to oversee the entire chip design process;
  • Overseeing the physical design of deep submicron digital ASICs;
  • ASIC design tools, including synthesis, simulation, equivalence checking, and static timing analysis;
  • Using back-end Electronic Design Automation (EDA) tools to oversee the physical implementation of a chip design;
  • Scripting in TCL, Perl or Python to automate repetitive steps in the design process, such as logic synthesis, timing analysis, or place-and-route;
  • Overseeing Static Timing Analysis (STA) closure to ensure a chip design will function correctly at its target speed;
  • Owning global clock tree construction and analysis for best PPA;
  • Using Physical Design Closure, including floor planning, placement, clock tree synthesis (CTS), routing, and timing closure;
  • Managing silicon design projects; and
  • Leading an engineering team.

Can work remotely

Supervises

Preferred Skills: N/A

#LI-AM4



Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

Qualifications:

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

 

This posting is for an existing vacancy.

Education:UNAVAILABLEEmployment Type: FULL_TIME

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