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Principal Physical Design Engineer Jobs (NOW HIRING)

K2 Space

OR

$190K - $280K/yr

The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Beaverton, OR

$141K - $145K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Beaverton, OR · On-site

$141K - $145K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

K2 Space

Principal ASIC Physical Design Engineer

$190K - $280K/yr

The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design ...

Violet Ink

Physical Design Engineer

San Jose, CA · On-site

$159K - $164K/yr

Physical Design Engineer / Staff Engineer Location : San Jose CA Contract More than 12 months Relocation consultants are also considerable.. Job Responsibilities: We are seeking experienced Physical ...

Ambarella

$140K - $156K/yr

The Physical Design Engineer willbe an integral part of the physical design team with all aspects of physical design implementation and verification tasks for Ambarella's cutting edgelow powerAISoC ...

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All JobsPrincipal Physical Design Engineer Jobs

Principal Physical Design Engineer information

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$74K

$147.2K

$212.5K

How much do principal physical design engineer jobs pay per year?

As of Jul 1, 2026, the average yearly pay for principal physical design engineer in the United States is $147,220.00, according to ZipRecruiter salary data. Most workers in this role earn between $118,500.00 and $173,000.00 per year, depending on experience, location, and employer.

What is the difference between Principal Physical Design Engineer vs Physical Design Engineer?

AspectPrincipal Physical Design EngineerPhysical Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or related; extensive experienceBachelor's/Master's in Electrical Engineering or related; some experience
Work EnvironmentLead design teams, oversee complex chip layouts, strategic planningImplement physical design tasks, optimize layouts, follow design flows
Industry UsageUsed in advanced semiconductor companies, high-level design rolesCommon in semiconductor companies, entry to mid-level roles

The Principal Physical Design Engineer typically holds a senior role with leadership responsibilities, overseeing complex projects and guiding teams. In contrast, a Physical Design Engineer focuses on executing physical design tasks under supervision. Both roles require similar technical skills and industry experience, but the principal position involves strategic planning and higher-level decision-making.

What are Principal Physical Design Engineers?

Principal Physical Design Engineers are senior professionals in the semiconductor industry responsible for overseeing the physical implementation of integrated circuit (IC) designs. They lead teams in tasks like floorplanning, placement, routing, timing closure, and verification to ensure that chip layouts meet performance, power, and area requirements. These engineers use specialized design tools and collaborate closely with other engineering teams throughout the chip development process. Their expertise is crucial for translating circuit schematics into manufacturable silicon.

What are the key skills and qualifications needed to thrive as a Principal Physical Design Engineer, and why are they important?

To thrive as a Principal Physical Design Engineer, you need deep expertise in ASIC/FPGA physical design, strong knowledge of RTL-to-GDSII flow, and a relevant degree in electrical or computer engineering. Proficiency with EDA tools such as Synopsys, Cadence, or Mentor Graphics, as well as familiarity with scripting languages and industry-standard verification methodologies, is essential. Exceptional problem-solving, leadership, and communication skills help drive complex projects and collaborate across cross-functional teams. These skills are crucial to ensure optimal chip performance, timely delivery, and successful integration within advanced semiconductor development environments.

What are some typical challenges faced by Principal Physical Design Engineers when managing complex chip development projects?

Principal Physical Design Engineers often navigate challenges such as balancing power, performance, and area (PPA) requirements while meeting tight project deadlines. They must coordinate across multiple teams, including logic design and verification, to resolve integration issues and ensure that design constraints are met. Additionally, they frequently address timing closure and signal integrity concerns, requiring advanced problem-solving and project management skills. The role demands staying current with EDA tools and process technologies to drive innovation and efficiency in chip design workflows.
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What job categories do people searching Principal Physical Design Engineer jobs look for? The top searched job categories for Principal Physical Design Engineer jobs are:
Principal Physical Design Engineer jobs near you
Infographic showing various Principal Physical Design Engineer job openings in the United States as of June 2026, with employment types broken down into 59% Full Time, 34% Part Time, and 7% Contract. Highlights an 98% Physical, 1% Hybrid, and 1% Remote job distribution, with an average salary of $147,220 per year, or $70.8 per hour.
Principal ASIC Physical Design Engineer

Principal ASIC Physical Design Engineer

K2 Space

OR

$190K - $280K/yr

Other

Medical, Dental, Vision, Life, PTO

Posted 4 days ago

Job description

The Role

We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design flow-from RTL handoff to GDSII-and collaborate closely with architecture, RTL design, DFT, and packaging teams. This role also involves managing external physical design partners, driving tool and flow decisions, and ensuring first-pass silicon success in advanced FinFET technologies. You'll be a key contributor in achieving timing closure, optimizing PPA, and supporting design integration with external partners. You will be part of a collaborative design team developing state-of-the-art mixed-signal SoCs to be hosted on some of the largest, most powerful, rapidly designed and rapidly manufactured satellites ever deployed in space. In your first 6 months, you will develop and implement new SoC sub-systems for satellite communications and beyond. In your first two years, you will have contributed to developing cutting-edge SoCs that will fly in space. 

Responsibilities

  • Own the complete RTL-to-GDSII flow: synthesis, floorplanning, place & route, clock tree synthesis (CTS), static timing analysis (STA), physical verification (DRC/LVS), and sign-off.
  • Develop and maintain physical design methodologies, scripts, and automation to optimize performance, power, and area (PPA).
  • Collaborate with front-end and verification teams to ensure clean handoffs, timing closure, and efficient design iteration.
  • Drive timing closure across multiple voltage and process corners, including sign-off with foundry-qualified tools.
  • Partner with package, SI/PI, and test teams for package-aware floorplanning and chip-to-board integration.
  • Manage and technically guide external physical design partners and service vendors, ensuring alignment on milestones, deliverables, and quality standards.
  • Work with EDA vendors to debug and optimize tool flows, and evaluate new methodologies.
  • Support chip bring-up and debug through close collaboration with post-silicon and test teams.
  • Support your product through production and spaceflight.

Required Qualifications 

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
  • 10+ years of experience in ASIC physical design for high-performance SoCs.
  • Proven end-to-end expertise in RTL-to-GDSII flows using industry tools (Synopsys, Cadence, or Siemens).
  • Strong hands-on experience with timing closure, IR drop analysis, and ECO implementation.
  • Deep understanding of physical design constraints for multi-clock, multi-voltage, and hierarchical SoCs.
  • Experience with advanced FinFET process nodes.
  • Prior experience managing or coordinating offshore/outsourced PD teams or vendors.
  • Familiarity with DFT integration, STA sign-off, and power domain implementation (UPF/CPF).
  • Excellent communication, leadership, and cross-functional collaboration skills.
  • Act as technical leader and subject-matter expert helping to teach, grow, and mentor others in the team.

Preferred Qualifications 

  • Exposure to radiation-hardened or space-qualified ASICs.
  • Experience with chip-package co-design or advanced packaging (2.5D/3D).
  • Familiarity with physical design service vendor management or offshore collaboration.
  • Experience driving tapeouts through TSMC.
  • Experience with Gate-All-Around technologies.
  • Experience working in cross-functional, geographically distributed teams.

Compensation and Benefits:

  • Base salary range for this role is $190,000 - $280,000 + equity in the company
  • Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
  • Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

About K2 Space

Sourced by ZipRecruiter

Industry

Guided missile and space vehicle manufacturing

Company size

11 - 50 Employees

Headquarters location

Los Angeles, CA, US

Year founded

2022

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