ZipRecruiter

Log In

1

Pre Silicon Verification Engineer Jobs (NOW HIRING)

Apple

GPU DFT Design Verification Engineer

Austin, TX

$147.40K - $272.10K/yr

The DFT Design Verification Engineer will be on a team which is responsible for the complete DFT pre-silicon verification and support for silicon bring-up of GPU core. Description As a DFT ...

Apple

GPU DFT Design Verification Engineer

Austin, TX

$147.40K - $272.10K/yr

The DFT Design Verification Engineer will be on a team which is responsible for the complete DFT pre-silicon verification and support for silicon bring-up of GPU core. Description As a DFT ...

Apple

GPU DFT Design Verification Engineer

Austin, TX

$181.10K - $318.40K/yr

The DFT Design Verification Engineer will be on a team which is responsible for the complete DFT pre-silicon verification and support for silicon bring-up of GPU core. Description As a DFT ...

Apple

GPU DFT Design Verification Engineer

Austin, TX

$181.10K - $318.40K/yr

The DFT Design Verification Engineer will be on a team which is responsible for the complete DFT pre-silicon verification and support for silicon bring-up of GPU core. Description As a DFT ...

Apple

GPU DFT Design Verification Engineer

Austin, TX · On-site

$181.10K - $318.40K/yr

The DFT Design Verification Engineer will be on a team which is responsible for the complete DFT pre-silicon verification and support for silicon bring-up of GPU core. Description As a DFT ...

next page

Showing results 1-20

People also search for

All JobsPre Silicon Verification Engineer Jobs

Pre Silicon Verification Engineer information

See salary details

$80K

$142.6K

$203.5K

How much do pre silicon verification engineer jobs pay per year?

As of May 31, 2026, the average yearly pay for pre silicon verification engineer in the United States is $142,619.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Pre Silicon Verification Engineer, and why are they important?

To thrive as a Pre Silicon Verification Engineer, you need a strong background in digital design principles, hardware description languages like Verilog or VHDL, and typically a degree in electrical or computer engineering. Experience with verification methodologies such as UVM, scripting languages (Python, Perl), and simulation tools like ModelSim or VCS is commonly required. Attention to detail, analytical thinking, and effective teamwork are vital soft skills for debugging complex systems and collaborating with design teams. These skills ensure robust verification processes, reducing design errors and enabling successful chip development before manufacturing.

How does a Pre Silicon Verification Engineer typically collaborate with design and validation teams during a project?

Pre Silicon Verification Engineers work closely with both design and validation teams to ensure that new hardware designs function as intended before manufacturing. They regularly participate in design reviews, clarify specifications, and provide feedback on testability and potential design issues. Effective collaboration often involves daily stand-up meetings, shared documentation, and synchronized test planning to align verification strategies with the evolving design. This cross-functional teamwork is essential for identifying bugs early and streamlining the development cycle.

What are Pre Silicon Verification Engineers?

Pre Silicon Verification Engineers are professionals who ensure that integrated circuit (IC) designs function correctly before they are manufactured into silicon chips. They use simulation, modeling, and various verification methodologies to identify and fix design errors early in the development process. Their work helps reduce costly mistakes and ensures that the final hardware meets all functional and performance requirements. These engineers collaborate closely with design, validation, and hardware teams throughout the product development lifecycle.

What is the difference between Pre Silicon Verification Engineer vs Digital Verification Engineer?

AspectPre Silicon Verification EngineerDigital Verification Engineer
CredentialsBachelor's or Master's in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering or Computer Engineering
Work EnvironmentDesign teams, FPGA labs, simulation environmentsSimulation platforms, test benches, FPGA/ASIC labs
Industry UsageSemiconductor, chip design, hardware developmentASIC/FPGA design, hardware verification, chip development

Pre Silicon Verification Engineers focus on verifying hardware designs before silicon fabrication, often using simulation and emulation tools. Digital Verification Engineers also verify digital hardware but may work across a broader range of digital systems, including post-silicon validation. Both roles require similar skills and credentials, but their specific tasks and focus areas differ within the hardware development process.

More about Pre Silicon Verification Engineer jobs
What cities are hiring for Pre Silicon Verification Engineer jobs? Cities with the most Pre Silicon Verification Engineer job openings:
What states have the most Pre Silicon Verification Engineer jobs? States with the most job openings for Pre Silicon Verification Engineer jobs include:
What job categories do people searching Pre Silicon Verification Engineer jobs look for? The top searched job categories for Pre Silicon Verification Engineer jobs are:
Pre Silicon Verification Engineer jobs near you
Infographic showing various Pre Silicon Verification Engineer job openings in the United States as of May 2026, with employment types broken down into 56% Full Time, and 44% Part Time. Highlights an 97% Physical, 2% Hybrid, and 1% Remote job distribution, with an average salary of $142,619 per year, or $68.6 per hour.
Applied ML - Functional Verification Engineer

Applied ML - Functional Verification Engineer

Cadence Design Systems, Inc.

San Jose, CA • On-site

$114.80K - $213.20K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 26 days ago

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Position Overview
Cadence Design Systems Inc. is looking for a motivated and results driven Pre-Silicon Verification Engineer with extensive experience in function verification (formal verification and/or simulation/UVM verification) and a passion for leveraging artificial intelligence to redefine the verification landscape. In this role, you will be part of the ChipStack AI Super Agent team and will operate at the forefront of semiconductor design and AI innovation, utilizing advanced AI tools to architect, design, and validate the next generation of verification methodologies. You will collaborate closely with a highly skilled team of machine learning engineers experienced in training large language models at scale, as well as accomplished software engineers with proven expertise in product development and deployment. You will be working on the world's first agentic AI platform that autonomously designs and verifies chips with up to 10× productivity gains.
Key Responsibilities
  • Contribute to the application of machine learning techniques aimed at streamlining traditional pre-silicon functional verification methodologies like formal verification and UVM.
  • Develop agentic AI solutions using LLMs and latest ML technologies to accelerate pre-silicon Design Verification process.
  • Employ AI enhanced Electronic Design Automation (EDA) tools to improve and expedite both the design and verification lifecycles.
  • Engage directly with customers to understand requirements and deliver innovative, practical verification strategies.
  • Collaborate effectively with machine learning and software engineering teams to validate output correctness, efficiency, and quality.
  • Maintain current knowledge of advancements in AI-powered hardware verification and actively participate in fostering internal knowledge growth.

Required Qualifications
  • BS with a minimum of 4 years of experience OR MS with a minimum of 2 years of experience OR new PhD Graduate
  • Proven expertise of more than 3 years in at least one of the pre-silicon ASIC verification methodologies such as Formal, SV/UVM and/or OVM.
  • Advanced skills in debugging pre-silicon verification failures using waveform viewers and simulation analysis tools.
  • Hands-on experience with industry standard EDA tools (e.g., Jasper, Xcelium, IMC).
  • Strong programming skills in Verilog, System Verilog and Python
  • Excellent communication skills and the ability to thrive in a team-oriented environment.
  • Self-motivated, with a proactive approach to problem solving, continuous learning, and innovation.
  • Exposure to LLMs and ML technologies like RAG, RFT, RL, and Agentic frameworks would be a plus.

The Cadence Advantage
  • The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
  • Cadence's employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
  • The unique "One Cadence - One Team" culture promotes collaboration within and across teams to ensure customer success
  • Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
  • You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other-every day.

The annual salary range for California is $114,800 to $213,200. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We're doing work that matters. Help us solve what others can't.

Apply