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Physical Design Engineer Jobs in Texas (NOW HIRING)

Physical Design Engineer

Austin, TX

$134.80K - $138.70K/yr

Physical Design Engineer Sunnyvale CA or Austin TX- Onsite Fulltime / FTE Salary: Market- Negotiable Job Overview: We are looking for a highly skilled Physical Design Engineer to work at block level ...

Physical Design Engineer

Frisco, TX · On-site

$127.30K - $131K/yr

This is a full time position with our company doing Physical Design Engineering. What you'll do * Lead end to end Physical Design from floorplan to GDS * Own full PnR flow: placement, CTS, routing ...

Physical Design Engineer

Austin, TX · On-site

$134.80K - $138.80K/yr

Hudson River Trading (HRT) is seeking a Physical Design Engineer with a broad, versatile skillset to join our growing Hardware team. In this role, you will help deliver performance-critical ASICs and ...

Physical Design Engineer

Austin, TX · On-site

$100K - $500K/yr

Tenstorrent is seeking a talented Physical Design Engineer to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from ...

Developer (Physical Design Engineer)

Austin, TX · On-site

$134.80K - $138.80K/yr

... Physical Design Engineer) in Austin, TX; Hybrid work policy w/in commuting distance, who will serve to design and validate electronic circuits and components for use in telecommunications. What you ...

Staff Physical Design Engineer

Austin, TX · On-site

$154.84K - $232.26K/yr

Staff Physical Design Engineer - eFPGA IP Location: San Jose, CA/ Austin,TX (Hybrid) Employment Type: Full-Time About the Role We are seeking a Staff Physical Design Engineer to join our embedded ...

GPU Top Level Physical Design Engineer

Austin, TX · On-site

$134.80K - $138.70K/yr

GPU Top Level Physical Design Engineer Work Locations (2) Submit Resume Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail?

SMTS Physical Design Engineer

Richardson, TX · On-site

$123.50K - $127.10K/yr

As the Physical Design Engineer, you will own the complete back-end implementation of a high-speed interface chip program - from synthesis netlist through GDSII tape-out. This is a full-flow PD role ...

Staff Physical Design Engineer

Austin, TX · On-site

$100K - $500K/yr

Tenstorrent is seeking talented Physical Design Engineers to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from ...

GPU Physical Design Engineer

Austin, TX · On-site

$134.80K - $138.80K/yr

This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to ...

Physical Design Engineer, PnR

Austin, TX · On-site

$100K - $500K/yr

Tenstorrent is seeking talented Physical Design Engineers to implement high-performance partitions for an industry-leading AI SOC. You'll own the complete implementation flow from synthesis to ...

Your Impact As a Physical Design Engineer with Acacia, you will focus on the technical execution of high-performance ASIC designs. Working as an individual contributor, you will lead the RTL-to-GDSII ...

Senior CPU Physical Design Engineer

Austin, TX

$134.80K - $138.80K/yr

The Role: As a CPU Physical Design Engineer, you will be a vital member of Intel's E-Core/Atom microprocessor design team, shaping the future of high-performance CPUs. This role offers the ...

GPU Physical Design Engineer

Austin, TX · On-site

$134.80K - $138.80K/yr

This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to ...

GPU Physical Design Engineer

Austin, TX · On-site

$134.80K - $138.80K/yr

This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to ...

GPU Physical Design Engineer

Austin, TX · On-site

$134.80K - $138.80K/yr

This role requires a mix of strategic engineering along with hands-on experience in physical design and large chip integration, being responsible for implementing complete chip design from RTL to ...

Tenstorrent is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our complex AI and CPU System-on-Chip designs. You'll orchestrate cross-disciplinary ...

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Physical Design Engineer information

See Texas salary details

$88.5K

$131.8K

How much do physical design engineer jobs pay per year?

As of May 28, 2026, the average yearly pay for physical design engineer in Texas is $129,881.00, according to ZipRecruiter salary data. Most workers in this role earn between $126,700.00 and $130,400.00 per year, depending on experience, location, and employer.

What is a Physical Design Engineer job?

A Physical Design Engineer is responsible for transforming logical circuit designs into a physical layout that can be manufactured as an integrated circuit (IC). They focus on key aspects like floor planning, placement, clock tree synthesis (CTS), routing, and timing closure while ensuring power and performance optimization. They work with Electronic Design Automation (EDA) tools and collaborate with front-end designers to meet design specifications. The role requires proficiency in tools such as Cadence, Synopsys, or Mentor Graphics and knowledge of processes like ASIC or SoC design.

What are the key skills and qualifications needed to thrive in the Physical Design Engineer position, and why are they important?

To thrive as a Physical Design Engineer, you need a solid background in electrical engineering, experience with ASIC or SoC design methodologies, and a deep understanding of digital circuit fundamentals. Proficiency with EDA tools like Synopsys, Cadence, or Mentor Graphics, as well as familiarity with scripting languages and industry certifications, is highly valued. Attention to detail, effective teamwork, and strong problem-solving skills are essential soft skills for this role. These qualifications are crucial as they enable efficient chip design, ensure successful project delivery, and foster productive collaboration in complex engineering environments.

What are the typical daily responsibilities of a Physical Design Engineer?

As a Physical Design Engineer, your daily responsibilities typically include taking logical circuit designs and translating them into physical layouts, performing floorplanning, placement, and routing of blocks, and conducting timing closure and verification. You will use specialized EDA tools to ensure that designs meet performance, power, and area requirements, collaborating closely with design, verification, and manufacturing teams. The role also involves resolving design issues, optimizing chip layouts, and preparing design data for fabrication. Working in this position provides exposure to advanced technology nodes and the opportunity to contribute directly to the development of cutting-edge semiconductor products.
What are the most commonly searched types of Physical Design Engineer jobs in Texas? The most popular types of Physical Design Engineer jobs in Texas are:
What job categories do people searching Physical Design Engineer jobs in Texas look for? The top searched job categories for Physical Design Engineer jobs in Texas are:
What cities in Texas are hiring for Physical Design Engineer jobs? Cities in Texas with the most Physical Design Engineer job openings:
Physical Design Engineer

$134.80K - $138.70K/yr

Other

Posted 15 days ago


Job description

Physical Design Engineer
Sunnyvale CA or Austin TX- Onsite
Fulltime / FTE
Salary: Market- Negotiable
Job Overview:
We are looking for a highly skilled Physical Design Engineer to work at block level and/or top level for high-performance ASICs, SoCs, and custom silicon chips with strong scripting skills. The ideal candidate will be responsible for various aspects of the backend VLSI design flow, including floorplanning, placement, clock tree synthesis (CTS), routing, timing closure, and sign-off verification. The role requires expertise in EDA tools, physical verification methodologies, power optimization, and performance tuning.

Key Responsibilities:
Block-Level Physical Design:
  • Floorplanning & Partitioning – Define optimal floorplan with power grid, macro placements, and congestion analysis.
  • Strong scripting experience.
  • Placement & Optimization – Perform standard cell placement, legalization, and optimization to improve area, power, and timing.
  • Clock Tree Synthesis (CTS) – Design and optimize low-skew, high-performance clock networks.
  • Routing & DRC Closure – Ensure successful global and detailed routing, meeting design rule constraints.
  • Timing Closure – Work on setup/hold timing violations, signal integrity, and cross-talk reduction using static timing analysis (STA).
  • Power & IR Drop Analysis – Optimize power planning, power integrity (IR drop, EM), and leakage reduction techniques.
Top-Level Physical Design:
  • Chip-Level Floorplanning & Hierarchical Design – Manage top-level layout planning, pin assignments, and cross-block optimizations.
  • Strong scripting experience.
  • Clock & Power Distribution – Design robust clock trees and power delivery networks (PDN).
  • Integration of IP & Sub-blocks – Ensure seamless integration of IP blocks and handle complex routing challenges.
  • Chip Assembly & Sign-Off – Perform final netlist-to-GDSII implementation, addressing physical and electrical verification.
DFT Integration – Work with Design for Test (DFT) teams to ensure scan chain connectivity and testability.