Physical Design Engineer Jobs in McKinney, TX (NOW HIRING)

This is a full time position with our company doing Physical Design Engineering. What you'll do * Lead end to end Physical Design from floorplan to GDS * Own full PnR flow: placement, CTS, routing ...

As the Physical Design Engineer, you will own the complete back-end implementation of a high-speed interface chip program - from synthesis netlist through GDSII tape-out. This is a full-flow PD role ...

... Design and Integration Engineers with SRAM/RF specification and synthesis design constraints. Resolve and improve design and flow issues related to physical design, identify potential solutions, and ...

... Design and Integration Engineers with SRAM/RF specification and synthesis design constraints. Resolve and improve design and flow issues related to physical design, identify potential solutions, and ...

Mentor engineers and represent physical design in tape-out reviews and executive-level technical discussions. Minimum Qualifications: * Bachelor's degree in Electrical Engineering, Computer ...

Mentor engineers and represent physical design in tapeout reviews and executivelevel technical discussions. Minimum Qualifications: * Bachelor's degree in Electrical Engineering, Computer Engineering ...

As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work ...

As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work ...

As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work ...

Participate in tapeout readiness activities including engineering change order (ECO) flows, checklists, design reviews, and postsilicon debug by correlating silicon behavior with physical design ...

Participate in tapeout readiness activities including engineering change order (ECO) flows, checklists, design reviews, and post-silicon debug by correlating silicon behavior with physical design ...

RTL Design Engineer Location: Santa Clara, CA/Remote Minimum 10 years of strong experience in ... physical design teams on timing constraints and other design topics using Verilog/System Verilog ...

As the Digital Design Engineer / Chip Lead, you will be the technical anchor of a small, senior team spanning analog design, layout, silicon characterization, physical design, and verification ...

As an SoC Design Engineer , you will be part of the Heterogeneous Integration Group (HIG ... You will work closely with architecture, verification, physical design, firmware, and product teams ...

As an SoC Design Engineer , you will be part of the Heterogeneous Integration Group (HIG ... You will work closely with architecture, verification, physical design, firmware, and product teams ...

Work on physical design for timing closure. * Partner with business teams and system engineering to develop mutually agreeable design specifications * Provide high-level analysis on chip architecture ...

This position is best suited for a junior-mid level engineer who is hungry, humble and smart and is excited about growing his or her skillset in integrated circuit layout design and physical design.

Work on physical design for timing closure. * Partner with business teams and system engineering to develop mutually agreeable design specifications * Provide high-level analysis on chip architecture ...

You will work closely with RTL design, physical design, architecture, design for test (DFT ... Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.

You will work closely with RTL design, physical design, architecture, design for test (DFT ... Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.