What you'll do The Packaging Engineer position requires handling all aspects of packaging development. This means planning, crafting, and developing advanced or novel packaging. The role also ...
What you'll do The Packaging Engineer position requires handling all aspects of packaging development. This means planning, crafting, and developing advanced or novel packaging. The role also ...
What you'll do The Packaging Engineer position requires handling all aspects of packaging development. This means planning, crafting, and developing advanced or novel packaging. The role also ...
What you'll do The Packaging Engineer position requires handling all aspects of packaging development. This means planning, crafting, and developing advanced or novel packaging. The role also ...
The individual is fully conversant with microelectronics packaging technologies and has in-depth understanding of the interactions between manufacturing processes, verification testing, and quality ...
New
The individual is fully conversant with microelectronics packaging technologies and has in-depth understanding of the interactions between manufacturing processes, verification testing, and quality ...
New
The individual is fully conversant with microelectronics packaging technologies and has in-depth understanding of the interactions between manufacturing processes, verification testing, and quality ...
New
The individual is fully conversant with microelectronics packaging technologies and has in-depth understanding of the interactions between manufacturing processes, verification testing, and quality ...
New
The individual is fully conversant with microelectronics packaging technologies and has in-depth understanding of the interactions between manufacturing processes, verification testing, and quality ...
The individual is fully conversant with microelectronics packaging technologies and has in-depth understanding of the interactions between manufacturing processes, verification testing, and quality ...
AutoCAD and/or other 3D CAD software packages * No clearance required to start, but must have the ability to obtain and maintain a TS/SCI security clearance with Poly * United States Citizenship ...
AutoCAD and/or other 3D CAD software packages * No clearance required to start, but must have the ability to obtain and maintain a TS/SCI security clearance with Poly * United States Citizenship ...
Strong candidates may come from electrical engineering, computer engineering, MEMS, microelectronics packaging, mechanical engineering, biomedical engineering, automation, applied physics, or related ...
Strong candidates may come from electrical engineering, computer engineering, MEMS, microelectronics packaging, mechanical engineering, biomedical engineering, automation, applied physics, or related ...
Microelectronics Assembler Hauppauge, NY | 1st Shift (7:00 AM - 3:30 PM) Temp-to-Hire * Must be US ... Competitive pay and full benefits package upon conversion, including medical, 401(k), life ...
Quick apply
Microelectronics Assembler Hauppauge, NY | 1st Shift (7:00 AM - 3:30 PM) Temp-to-Hire * Must be US ... Competitive pay and full benefits package upon conversion, including medical, 401(k), life ...
AutoCAD and/or other 3D CAD software packages * No clearance required to start, but must have the ability to obtain and maintain a TS/SCI security clearance with Poly * United States Citizenship ...
AutoCAD and/or other 3D CAD software packages * No clearance required to start, but must have the ability to obtain and maintain a TS/SCI security clearance with Poly * United States Citizenship ...
Strong candidates may come from electrical engineering, computer engineering, MEMS, microelectronics packaging, mechanical engineering, biomedical engineering, automation, applied physics, or related ...
Strong candidates may come from electrical engineering, computer engineering, MEMS, microelectronics packaging, mechanical engineering, biomedical engineering, automation, applied physics, or related ...
Principal Electrical Engineer
Phoenix, AZ · On-site
$130K - $159K/yr
Manage the design of microelectronic digital and RF packaged circuits that meet system and customer requirements * Execute microelectronics hardware development involving FPGAs, DACs, ADCs, storage ...
Principal Electrical Engineer
Phoenix, AZ · On-site
$130K - $159K/yr
Manage the design of microelectronic digital and RF packaged circuits that meet system and customer requirements * Execute microelectronics hardware development involving FPGAs, DACs, ADCs, storage ...
Advanced technical degree * 3+ years industry experience with microelectronics packaging development * Hands-on packaging, PCB, PCBA, or SMT assembly experience * OSAT (outsource semiconductor ...
Advanced technical degree * 3+ years industry experience with microelectronics packaging development * Hands-on packaging, PCB, PCBA, or SMT assembly experience * OSAT (outsource semiconductor ...
Principal Electrical Engineer
Phoenix, AZ · On-site
$130K - $159K/yr
Manage the design of microelectronic digital and RF packaged circuits that meet system and customer requirements * Execute microelectronics hardware development involving FPGAs, DACs, ADCs, storage ...
Principal Electrical Engineer
Phoenix, AZ · On-site
$130K - $159K/yr
Manage the design of microelectronic digital and RF packaged circuits that meet system and customer requirements * Execute microelectronics hardware development involving FPGAs, DACs, ADCs, storage ...
Electromechanical Packaging Engineer
Torrance, CA · On-site
$150K - $200K/yr
Minimum BS in Mechanical or Electrical engineering, MS or higher-level degree preferred. * 5+ years' experience with microelectronics packaging, and/or PCB design * Knowledge of foundry processes and ...
Electromechanical Packaging Engineer
Torrance, CA · On-site
$150K - $200K/yr
Minimum BS in Mechanical or Electrical engineering, MS or higher-level degree preferred. * 5+ years' experience with microelectronics packaging, and/or PCB design * Knowledge of foundry processes and ...
Advanced technical degree * 3+ years industry experience with microelectronics packaging development * Hands-on packaging, PCB, PCBA, or SMT assembly experience * OSAT (outsource semiconductor ...
Advanced technical degree * 3+ years industry experience with microelectronics packaging development * Hands-on packaging, PCB, PCBA, or SMT assembly experience * OSAT (outsource semiconductor ...
Advanced technical degree * 7+ years industry experience with microelectronics packaging development * Packaging familiarity with flip-chip, BGA, fcCSP, WLCSP, fan out FO processes, system-in-package ...
Advanced technical degree * 7+ years industry experience with microelectronics packaging development * Packaging familiarity with flip-chip, BGA, fcCSP, WLCSP, fan out FO processes, system-in-package ...
Electromechanical Packaging Engineer
Torrance, CA · On-site
$150K - $200K/yr
Minimum BS in Mechanical or Electrical engineering, MS or higher-level degree preferred. * 5+ years' experience with microelectronics packaging, and/or PCB design * Knowledge of foundry processes and ...
Electromechanical Packaging Engineer
Torrance, CA · On-site
$150K - $200K/yr
Minimum BS in Mechanical or Electrical engineering, MS or higher-level degree preferred. * 5+ years' experience with microelectronics packaging, and/or PCB design * Knowledge of foundry processes and ...
Principal Electrical Engineer
Phoenix, AZ · On-site
$130K - $159K/yr
Manage the design of microelectronic digital and RF packaged circuits that meet system and customer requirements * Execute microelectronics hardware development involving FPGAs, DACs, ADCs, storage ...
Principal Electrical Engineer
Phoenix, AZ · On-site
$130K - $159K/yr
Manage the design of microelectronic digital and RF packaged circuits that meet system and customer requirements * Execute microelectronics hardware development involving FPGAs, DACs, ADCs, storage ...
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$135K/yr
Microelectronic package or PCB physical layout design and the associated manufacturing processes. Preferred Qualifications * Experience in microelectronic package substrate design, package I/O ...
Silicon Packaging Design Engineer
Phoenix, AZ · On-site
$135K/yr
Microelectronic package or PCB physical layout design and the associated manufacturing processes. Preferred Qualifications * Experience in microelectronic package substrate design, package I/O ...
Principal level Mechanical/Thermal Engineer developing next generation microelectronic packaging technology with emphasis on advanced packaging design. * Chosen candidate will work closely with ...
Posted today
Principal level Mechanical/Thermal Engineer developing next generation microelectronic packaging technology with emphasis on advanced packaging design. * Chosen candidate will work closely with ...
Posted today
Microelectronics Packaging information
See salary details
$12.02 - $13.09
1% of jobs
$13.09 - $14.16
2% of jobs
$14.16 - $15.23
5% of jobs
$15.23 - $16.30
11% of jobs
$16.61 is the 25th percentile. Wages below this are outliers.
$16.30 - $17.37
21% of jobs
The median wage is $18.05 / hr.
$17.37 - $18.44
16% of jobs
$18.44 - $19.51
17% of jobs
$19.72 is the 75th percentile. Wages above this are outliers.
$19.51 - $20.59
13% of jobs
$20.59 - $21.66
6% of jobs
$21.66 - $22.73
5% of jobs
$22.73 - $23.80
3% of jobs
$12
$18
$23
How much do microelectronics packaging jobs pay per hour?
What is the difference between Microelectronics Packaging vs Semiconductor Process Engineer?
| Aspect | Microelectronics Packaging | Semiconductor Process Engineer |
|---|---|---|
| Credentials | Typically requires a degree in electrical engineering, materials science, or related fields; certifications in packaging technologies are a plus | Requires a degree in electrical engineering, materials science, or chemical engineering; process-specific certifications may be beneficial |
| Work Environment | Manufacturing floors, cleanrooms, R&D labs focused on packaging and assembly | Semiconductor fabrication plants, cleanrooms, process development labs |
| Industry Usage | Design, develop, and test packaging solutions for microelectronic devices | Develop and optimize manufacturing processes for semiconductor fabrication |
Microelectronics Packaging professionals focus on creating protective and functional packages for microchips, while Semiconductor Process Engineers work on the fabrication processes within semiconductor manufacturing. Both roles require technical expertise and often collaborate but serve different stages of the product lifecycle.
What is microelectronics packaging?
What are the key skills and qualifications needed to thrive as a Microelectronics Packaging Engineer, and why are they important?
What are some common challenges faced in microelectronics packaging roles, and how are they typically addressed?
Viasat rating
4.2
Based on 7 frontline employees who took The Breakroom Quiz
78th of 81 rated telecommunications companies
Job description
One team. Global challenges. Infinite opportunities. At Viasat, we’re on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate. We’re looking for people who think big, act fearlessly, and create an inclusive environment that drives positive impact to join our team.
What you'll do
The Packaging Engineer position requires handling all aspects of packaging development. This means planning, crafting, and developing advanced or novel packaging. The role also involves managing packaging efforts related to radio frequency communication devices. The products range from IC’s, System In Packages, sub-assemblies, and modules. The packaging development process includes package definition, stack-up, substrate layout, bond diagram, drawings, predictive modeling combined with system testing, technical risk/cost assessment, materials and process characterization, compilation of formal documentation, collaborating with sub-contractors and internal assembly and reliability resources, and final release of product.
The day-to-day
Job responsibilities include but not limited to:
- Working closely with project development teams and product groups (RFIC, MMIC, Module) to develop the next generation/sophisticated/novel packaging solution for RF communication products
- Define packages and materials that meet product requirements for reliability, performance, manufacturability, and cost.
- Ensure all packaging work is completed for New Product and New Technology Introductions
- Develop and manage packaging documentation including SOWs, package drawings, and process flow
- Build and layout of semiconductor packages including QFN, SiP, WL-CSP, RDL, Flip Chip, FO-WLP and Interposers
- Ensure early success in package development with modeling and simulation for thermal, mechanical, and electrical
- Technically oversee vendors in the manufacture of said packages in conjunction with manufacturing engineers
- apply your assembly knowledge of die attach, Wirebond, bumping, overmolding to advise product groups on options available to solve problems
- identify suitable IC, sub-assembly, and module package options and perform feasibility studies for new products
- interact with product groups for package/cost optimization along with mechanical engineering
- specify and conduct reliability testing by vendors to insure the reliability of the packaged product
- Coordinate package related activities across multiple organizations including Marketing, Design, Applications, Test, Assembly Engineering, Quality, and Manufacturing (internal and external factories)
- Address and solve materials and processing issues that may occur during the development process
- Manage the package process using industry standard project management tools.
- Develop and maintain the packaging and technology roadmap through proposal support and long term technology programs
What you'll need
- 10+ years in semiconductor packaging including experience in package assembly process, package engineering, quality & reliability and the intersection/relationship of packaging to test.
- Bachelor's Degree in Electrical, Mechanical, Materials Engineering or related technical discipline
- Deep understanding of micro-electronic package structure, mechanical, electrical and thermal performance.
- Solid grasp of heat transfer and its relation to material properties
- Packaging knowledge in RFIC, millimeterware, System In Package, sub-assembly, and/or modules.
- Experience in semiconductor package design with demonstrated experience in one or more of the following: QFN, SiP, BGA, WL-CSP, Flip Chip and Bumping or FO-WLP
- Strong understanding of Die Prep, Assembly (die attach, Wirebond, flip chip, etc) and Surface Mount Technology (SMT) process-equipment is desired.
- Have a high tolerance for ambiguity and solid interpersonal skills
- In-depth knowledge of interconnect reliability daisy chain testing, CPI and BLR.
- Understands the metallization schemes for laminates, interposers and SMT.
- Knowledge of statistical methods and Building of Experiments
- Must be able to work autonomously and help determine methods and procedures.
- Customer service oriented.
- Ability to work with build teams to translate IC/system requirements input packaging configurations
- Ability to manage and drive packaging
- US Government position. US Citizenship required
- Ability to travel up to 10%
This is an onsite role based in Tempe, AZ
What will help you on the job
- Strong Preference for RF, Microwave or mmWave experience
- Experience with package build software like Cadence APD/SiP
- Experience with electronic compose and layout tools such as Cadence Concept HDL, Mentor Graphics DxDesigner, or Zuken
- Prior volume OSAT experience is highly desired
- Experience in ITAR and Mil programs
- SolidWorks tool usage
- Knowledge or exposure of wafer to wafer bonding
- Knowledgeable about ATE
- IMAPs and/or MEPTEC membership
- Knows the latest semiconductor packaging trends.
- Understands MIL-STD-883 and JEDEC requirements.
- Proficient user of Microsoft Excel and other Office products.
#LI-AF1
Salary range
$155,500.00 - $246,000.00 / annually.For specific work locations within San Jose, the San Francisco Bay area and New York City metropolitan area, the base pay range for this role is $193,500.00- $290,500.00/ annually
At Viasat, we consider many factors when it comes to compensation, including the scope of the position as well as your background and experience. Base pay may vary depending on job-related knowledge, skills, and experience. Additional cash or stock incentives may be provided as part of the compensation package, in addition to a range of medical, financial, and/or other benefits, dependent on the position offered. Learn more about Viasat's comprehensive benefit offerings that are focused on your holistic health and wellness at https://careers.viasat.com/benefits.
EEO Statement
Viasat is proud to be an equal opportunity employer, seeking to create a welcoming and diverse environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, gender identity or expression, sexual orientation, national origin, ancestry, physical or mental disability, medical condition, marital status, genetics, age, or veteran status or any other applicable legally protected status or characteristic. If you would like to request an accommodation on the basis of disability for completing this on-line application, please click here.
Qualifications:- 10+ years in semiconductor packaging including experience in package assembly process, package engineering, quality & reliability and the intersection/relationship of packaging to test.
- Bachelor's Degree in Electrical, Mechanical, Materials Engineering or related technical discipline
- Deep understanding of micro-electronic package structure, mechanical, electrical and thermal performance.
- Solid grasp of heat transfer and its relation to material properties
- Packaging knowledge in RFIC, millimeterware, System In Package, sub-assembly, and/or modules.
- Experience in semiconductor package design with demonstrated experience in one or more of the following: QFN, SiP, BGA, WL-CSP, Flip Chip and Bumping or FO-WLP
- Strong understanding of Die Prep, Assembly (die attach, Wirebond, flip chip, etc) and Surface Mount Technology (SMT) process-equipment is desired.
- Have a high tolerance for ambiguity and solid interpersonal skills
- In-depth knowledge of interconnect reliability daisy chain testing, CPI and BLR.
- Understands the metallization schemes for laminates, interposers and SMT.
- Knowledge of statistical methods and Building of Experiments
- Must be able to work autonomously and help determine methods and procedures.
- Customer service oriented.
- Ability to work with build teams to translate IC/system requirements input packaging configurations
- Ability to manage and drive packaging
- US Government position. US Citizenship required
- Ability to travel up to 10%
This is an onsite role based in Tempe, AZ
About ViaSat
Sourced by ZipRecruiter
At Viasat, we're on a mission to deliver connections with the capacity to change the world. For more than 35 years, Viasat has helped shape how consumers, businesses, governments and militaries around the globe communicate.
Industry
Telecommunications
Company size
5,001 - 10,000 Employees
Headquarters location
Carlsbad, CA, US
Year founded
1986