Sr. RTL Engineer
Orlando, FL · On-site
MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Sr. RTL Engineer
Orlando, FL · On-site
MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
FPGA Engineer/ FPGA Hardware Engineer (level 2 or 3)
Melbourne, FL · On-site
$70K - $100K/hr
Develop RTL design code and simulation in VHDL, Verilog, and/or System Verilog. * Develop Hardware ... Perform ASIC/FPGA/SoPC verification using inspection, analysis, simulation, and test methods.
Quick apply
FPGA Engineer/ FPGA Hardware Engineer (level 2 or 3)
Melbourne, FL · On-site
$70K - $100K/hr
Develop RTL design code and simulation in VHDL, Verilog, and/or System Verilog. * Develop Hardware ... Perform ASIC/FPGA/SoPC verification using inspection, analysis, simulation, and test methods.
MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Quick apply
MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Sr. RTL Engineer
Orlando, FL · On-site
MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Sr. RTL Engineer
Orlando, FL · On-site
MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...
Hardware Engineer/ Electrical Engineer (FPGA) - Melbourne, FL - Onsite - Fulltime Opportunity
Melbourne, FL · On-site
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
Quick apply
Hardware Engineer/ Electrical Engineer (FPGA) - Melbourne, FL - Onsite - Fulltime Opportunity
Melbourne, FL · On-site
RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
FPGA Engineer
Melbourne, FL · On-site
$120K - $154K/yr
* RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
FPGA Engineer
Melbourne, FL · On-site
$120K - $154K/yr
* RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog ... Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior ...
ASIC & FPGA Design Engineer Stf
Orlando, FL · On-site +1
$114K - $158K/yr
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control.Our team delivers full custom analog and mixed signal ICs that power advanced ...
ASIC & FPGA Design Engineer Stf
Orlando, FL · On-site +1
$114K - $158K/yr
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control.Our team delivers full custom analog and mixed signal ICs that power advanced ...
ASIC & FPGA Design Engineer Stf
Orlando, FL · On-site +1
$114K - $158K/yr
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control.Our team delivers full custom analog and mixed signal ICs that power advanced ...
ASIC & FPGA Design Engineer Stf
Orlando, FL · On-site +1
$114K - $158K/yr
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control.Our team delivers full custom analog and mixed signal ICs that power advanced ...
ASIC & FPGA Design Engineer Stf
Orlando, FL · On-site
$114K - $158K/yr
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control. Our team delivers full custom analog and mixed signal ICs that power advanced ...
ASIC & FPGA Design Engineer Stf
Orlando, FL · On-site
$114K - $158K/yr
You will be the ASIC & FPGA Design Engineer for the ASIC/FPGA department at Lockheed Martin Missiles and Fire Control. Our team delivers full custom analog and mixed signal ICs that power advanced ...
FPGA Design Engineer Lead
$114K - $158K/yr
You will be the FPGA Design Engineer Lead for the Programmable Logic Design organization within ... Owning end to end development of sophisticated FPGA/ASIC architectures-from capture of requirements ...
FPGA Design Engineer Lead
$114K - $158K/yr
You will be the FPGA Design Engineer Lead for the Programmable Logic Design organization within ... Owning end to end development of sophisticated FPGA/ASIC architectures-from capture of requirements ...
FPGA Design Engineer Lead
$114K - $158K/yr
You will be the FPGA Design Engineer Lead for the Programmable Logic Design organization within ... Owning end to end development of sophisticated FPGA/ASIC architectures-from capture of requirements ...
FPGA Design Engineer Lead
$114K - $158K/yr
You will be the FPGA Design Engineer Lead for the Programmable Logic Design organization within ... Owning end to end development of sophisticated FPGA/ASIC architectures-from capture of requirements ...
FPGA Design Engineer Lead
Orlando, FL · On-site
$114K - $158K/yr
Your responsibilities will include: • Owning end to end development of sophisticated FPGA/ASIC ... peer engineers. • Driving the Design Architecture Development process, managing schedule ...
FPGA Design Engineer Lead
Orlando, FL · On-site
$114K - $158K/yr
Your responsibilities will include: • Owning end to end development of sophisticated FPGA/ASIC ... peer engineers. • Driving the Design Architecture Development process, managing schedule ...
FPGA Engineer (Intern)
Miami, FL · On-site
$4.3K - $4.8K/wk
... the internship. Your Objectives: * Design, implement and test FPGA solutions across Citadel ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
FPGA Engineer (Intern)
Miami, FL · On-site
$4.3K - $4.8K/wk
... the internship. Your Objectives: * Design, implement and test FPGA solutions across Citadel ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
FPGA Design Engineer Sr
Orlando, FL · On-site
$114K - $158K/yr
... detailed RTL (VHDL/Verilog/SystemVerilog) and accompanying constraints to meet timing, power and ... ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration ...
FPGA Design Engineer Sr
Orlando, FL · On-site
$114K - $158K/yr
... detailed RTL (VHDL/Verilog/SystemVerilog) and accompanying constraints to meet timing, power and ... ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration ...
Senior FPGA Design Engineer
$117K - $162K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
$117K - $162K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
$114K - $158K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
Senior FPGA Design Engineer
$114K - $158K/yr
As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...
ASIC & FPGA Design Engineering with Security Clearance
Orlando, FL · On-site
$114K - $158K/yr
ASIC & FPGA Design Engineering Job location: Orlando, FL - MFC Job duration: 02/26/2024 to 02/24/25 Job clearance: Interim Secret Clearance Required prior to start Work Schedule: 4/10A-1st Shift ...
ASIC & FPGA Design Engineering with Security Clearance
Orlando, FL · On-site
$114K - $158K/yr
ASIC & FPGA Design Engineering Job location: Orlando, FL - MFC Job duration: 02/26/2024 to 02/24/25 Job clearance: Interim Secret Clearance Required prior to start Work Schedule: 4/10A-1st Shift ...
FPGA Design Engineer Staff
$114K - $158K/yr
You will be the FPGA Design Engineer for the Missile &Fire Control (MFC) team at LockheedMartin ... Translating system specifications into detailed FPGA designs, creating RTL, constraints and HDL ...
FPGA Design Engineer Staff
$114K - $158K/yr
You will be the FPGA Design Engineer for the Missile &Fire Control (MFC) team at LockheedMartin ... Translating system specifications into detailed FPGA designs, creating RTL, constraints and HDL ...
FPGA Design Engineer Staff
$114K - $158K/yr
You will be the FPGA Design Engineer for the Missile &Fire Control (MFC) team at LockheedMartin ... Translating system specifications into detailed FPGA designs, creating RTL, constraints and HDL ...
FPGA Design Engineer Staff
$114K - $158K/yr
You will be the FPGA Design Engineer for the Missile &Fire Control (MFC) team at LockheedMartin ... Translating system specifications into detailed FPGA designs, creating RTL, constraints and HDL ...
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
As a Principal FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Internship Asic Rtl Design Engineer information
What types of projects and responsibilities can an intern expect as an ASIC RTL Design Engineer?
As an ASIC RTL Design Engineering intern, you'll typically work on tasks such as writing and verifying RTL code using languages like Verilog or VHDL, assisting with simulation and debugging, and collaborating closely with senior engineers on real design blocks. Interns often participate in design reviews, update documentation, and may get hands-on experience with synthesis and timing analysis tools. This role is highly collaborative and provides exposure to the complete ASIC development cycle, making it an excellent opportunity to build foundational skills and gain insight into industry-standard methodologies.
What are the key skills and qualifications needed to thrive as an Internship ASIC RTL Design Engineer, and why are they important?
To thrive as an Internship ASIC RTL Design Engineer, you need a solid understanding of digital logic design, computer architecture, and proficiency in HDL languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, and simulation environments is highly valuable. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with teams and learn quickly in a fast-paced environment. These skills and qualities are essential for contributing to complex chip design projects and ensuring accuracy and efficiency in RTL development.
What is an Internship ASIC RTL Design Engineer?
An Internship ASIC RTL (Register Transfer Level) Design Engineer is a student or recent graduate who assists in designing and developing digital integrated circuits (ICs) using hardware description languages like Verilog or VHDL. They work under the guidance of senior engineers to create, simulate, and verify RTL code for ASIC (Application Specific Integrated Circuit) projects. The role provides hands-on experience with the chip design process, including synthesis, timing analysis, and verification. Interns gain valuable exposure to industry-standard tools and methodologies, helping them prepare for a full-time engineering career.
What is the career path for ASIC design engineer?
The career path for an ASIC RTL design engineer typically starts with a bachelor's degree in electrical engineering or computer engineering, progressing to roles such as junior or senior RTL designer, then to lead or architect positions. Advancement often involves gaining experience in digital design, verification, and tools like HDL languages and EDA software, with opportunities to move into technical management or specialized roles like FPGA or system-on-chip (SoC) design.
What is RTL intern?
An RTL intern is a student or entry-level engineer gaining hands-on experience in Register Transfer Level (RTL) design, which involves developing and verifying digital hardware descriptions using hardware description languages like VHDL or Verilog. This internship typically includes tasks related to digital circuit design, simulation, and testing within an ASIC or FPGA development environment.
What is the salary of RTL design engineer?
The salary of an RTL design engineer typically ranges from $70,000 to $130,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in hardware description languages like VHDL or Verilog can earn higher salaries.
What is the salary of ASIC design engineer?
The salary of an ASIC RTL Design Engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in hardware description languages and verification tools can earn higher salaries.
What is the difference between Internship Asic Rtl Design Engineer vs Asic Verification Engineer?
| Aspect | Internship Asic Rtl Design Engineer | Asic Verification Engineer |
|---|---|---|
| Credentials | Typically pursuing or recently completed a degree in Electrical Engineering or Computer Engineering | Similar educational background, often with additional coursework in verification methodologies |
| Work Environment | Internship setting, supervised, focused on learning and assisting in RTL design tasks | Full-time role, focused on testing and verifying RTL designs |
| Industry Usage | Used in semiconductor and chip design companies during early career stages | Common in companies developing complex integrated circuits and chips |
The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.
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Full-time
Medical, Dental, Vision, Life, Retirement
Posted 14 days ago
Job description
About us:
With offices in the U.S. and Germany, MicroVision is at the forefront of driving the global adoption of innovative perception solutions, with the goal of making mobility and autonomy safer. Our engineering excellence, based in Florida, Washington State, Washington D.C., and Hamburg, Germany, enables us to develop and supply integrated lidar hardware and perception software solutions. Our proprietary technologies enhance safety and automation across various industrial applications, including robotics, automated warehouses, and agriculture, and are instrumental in the development of autonomous systems. MicroVision's core technology, initially developed for the automotive industry, continues to accelerate advanced driver-assistance systems (ADAS) and autonomous driving. Building on our history of providing technology to the military segment, our target offerings include semi- and fully autonomous airborne and terrestrial sensor systems. With our solid-state lidar technologies, encompassing MEMS-based long-range lidar and flash-based short-range lidar, integrated with our onboard perception software, MicroVision possesses the expertise to deliver safe mobility at the speed of life.
Job Summary:
MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of MicroVision's growing Digital Design Engineering team, you will collaborate with various technical teams in the company to design and take into production, market defining Automotive LiDAR product. The right candidate for this position will be a highly motivated FPGA/RTL Engineer with a breadth of understanding in FPGA design and best practices, including detailed design, System Verilog coding, modelling, simulation, verification, integration and test.
Essential Duties and Responsibilities:
Derive FPGA requirements based on system requirements then create FPGA architecture to fulfill those requirements
Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements
Own the detailed design of assigned firmware components and subsystem functionality
Document test and implementation plans at unit at system levels and then execute on it.
Work with other teams to integrate developed features into system hardware.
Support bringing up RTL features developed by the team.
Coach/mentor junior members of RTL and integration teams to complete tasks.
Participate in the full software development life cycle (SDLC) flow including peer reviews of requirements, architecture, design, and code implementations within an approved ASPICE development flow.
Required Knowledge, Skills and Abilities:
Knowledge of System Verilog, Verilog, Python programming languages
Proficient in FPGA Design methodologies from state machine design to DSP implementation
Experienced in closing timing in FPGA designs.
Mapping algorithms to FPGA appropriate logic implementations
Expert integrating and bringing up features in hardware.
Ability to work well in a fast-moving and complex environment.
Independently driven to complete project tasks
Experience with Configuration Management and Change Control concepts and tools (Git, Subversion, Jira, etc.)
Experience working with Functional Requirements and defining Requirement Based Tests
Experience performing HDL Synthesis/Simulation (eg. VCS, Synplicity, etc.)
Experience with design analyses (Timing, Lint, Clock Domain Crossings, Code Coverage, etc.) and IP compliance strategies
Experience designing portable, scalable Test Benches
Experience with UVM/OVM - Constrained random testing
Familiarity with hierarchical simulation and verification frameworks
Experience with intersystem communication protocols (I2C, UART, SPI, etc.)
Familiarity with microcontroller peripherals including one or more of the following: ADCs, DACs, Flash, EEPROM, timers and watchdogs
Working knowledge of data structures and algorithm fundamentals
Working knowledge of digital and analog electronics
Preferred Knowledge, Skills, and Abilities
Knowledgeable of control systems and digital signal processing fundamentals
Proficient in other embedded software systems developed in C / Cpp / etc.
Hands on experience with High-Level Synthesis (HLS)
Excellent scripting and automation skills. Bash shell, python, Make/CMake, and TCL desired
Extensive project experience working on embedded laser applications including Lidar
Safety-critical industry experience. (FIT analysis, etc.)
Working knowledge of various computing architectures beyond FPGAs, such as DSPs, GPUs, or MCUs, and their associated hardware computing platforms used to program them
Experience with ASIC design & migration from FPGA prototypes to production ASICs
Required Education and Experience:
BS in Electrical Engineering or related field and 5+ years of experience or equivalent combination of education and experience
MicroVision offers flexible work schedule that could include a hybrid schedule of onsite and remote work subject to team and business needs. You must live and reside within commuting distance from MicroVision's office in Orlando, FL.
We are not able to provide visa sponsorship for this position. You must be able to work in the US without sponsorship.
Benefits:
MicroVision is also proud to offer a comprehensive benefit program including:
Competitive compensation and equity program
Choice between an HSA Medical plan or a Buy-Up PPO Medical plan
Dental plan 100% employer-paid for employees
Vision coverageVision coverage 100% employer-paid for employees
401k plan with company match to help you save for your future (50% of your contributions up to the first 6% of your eligible pay)
Generous time off package including a flexible vacation program as well as incidental personal/sick days and floating holidays
Supplemental pay for Parental Leave
Company-paid basic life and AD&D insurance and long-term disability.
MicroVision is committed to an inclusive workplace. MicroVision is an equal opportunity employer and does not discriminate on the basis of race, creed, color, religion, national origin, sex, age, disability, marital status, sexual orientation, status as a disabled veteran or Vietnam-era veteran or any other basis prohibited by local, state or federal law.Please let us know if you need reasonable accommodation in completing the application, attending and/or participating in an interview or in taking any test required for employment.
MicroVision is an E-Verify participant. We will provide the Social Security Administration, and if necessary, the Department of Homeland Security, with information from each new employees' Form I-9 to confirm work authorization. Please note that we do not use this information to pre-screen job applicants.
Visit our website at www.microvision.com to learn more about our company.
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About MicroVision
Sourced by ZipRecruiter
Industry
Computer and electronic product manufacturing
Company size
51 - 200 Employees
Headquarters location
Redmond, WA, US
Year founded
1993