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Internship Asic Rtl Design Engineer Jobs in Florida

ASIC & FPGA Design Engineer Sr

Orlando, FL · On-site

$114.80K - $158.20K/yr

You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team ... RTL in VHDL/Verilog/SystemVerilog that satisfies performance, power, and reliability targets. • ...

As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC design in terms ... You will closely interact with RTL designer to understand design intent and clock structure, with ...

Description As an ASIC STA Engineer, you will have responsibilities spanning all aspects of SoC ... You will closely interact with RTL designer to understand design intent and clock structure, with ...

MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs > Required ...

MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs > Required ...

MicroVision has an immediate opportunity for a Senior RTL Engineer.   As a key member of ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...

MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...

MicroVision has an immediate opportunity for a Senior RTL Engineer. As a key member of MicroVision ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...

MicroVision has an immediate opportunity for a Staff RTL Engineer.   As a key member of ... Experience with ASIC design & migration from FPGA prototypes to production ASICs Required Education ...

Senior FPGA Design Engineer

Melbourne, FL · On-site

$120K - $150K/yr

... FPGA Design Engineer with at least 10 years of experience to develop the architecture ... Lead full life-cycle FPGA development, from requirements and architecture through RTL ...

FPGA Design Engineer Lead

Orlando, FL

$114.80K - $158.20K/yr

You will be the FPGA Design Engineer Lead for the Programmable Logic Design organization within ... Owning end to end development of sophisticated FPGA/ASIC architectures-from capture of requirements ...

FPGA Design Engineer Lead

Orlando, FL · On-site

$114.80K - $158.20K/yr

Your responsibilities will include: • Owning end to end development of sophisticated FPGA/ASIC ... peer engineers. • Driving the Design Architecture Development process, managing schedule ...

... the internship. Your Objectives: * Design, implement and test FPGA solutions across Citadel ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...

Senior FPGA Design Engineer

Miami, FL

$117.60K - $162.10K/yr

As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...

Senior FPGA Design Engineer

Orlando, FL

$114.80K - $158.20K/yr

As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...

FPGA Design Engineer Staff

Orlando, FL

$114.80K - $158.20K/yr

You will be the FPGA Design Engineer for the Missile &Fire Control (MFC) team at LockheedMartin ... Translating system specifications into detailed FPGA designs, creating RTL, constraints and HDL ...

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Internship Asic Rtl Design Engineer information

What are the key skills and qualifications needed to thrive as an Internship ASIC RTL Design Engineer, and why are they important?

To thrive as an Internship ASIC RTL Design Engineer, you need a solid understanding of digital logic design, computer architecture, and proficiency in HDL languages like Verilog or VHDL, typically supported by coursework in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, and simulation environments is highly valuable. Strong analytical thinking, attention to detail, and effective communication skills help interns collaborate with teams and learn quickly in a fast-paced environment. These skills and qualities are essential for contributing to complex chip design projects and ensuring accuracy and efficiency in RTL development.

What types of projects and responsibilities can an intern expect as an ASIC RTL Design Engineer?

As an ASIC RTL Design Engineering intern, you'll typically work on tasks such as writing and verifying RTL code using languages like Verilog or VHDL, assisting with simulation and debugging, and collaborating closely with senior engineers on real design blocks. Interns often participate in design reviews, update documentation, and may get hands-on experience with synthesis and timing analysis tools. This role is highly collaborative and provides exposure to the complete ASIC development cycle, making it an excellent opportunity to build foundational skills and gain insight into industry-standard methodologies.

What is an Internship ASIC RTL Design Engineer?

An Internship ASIC RTL (Register Transfer Level) Design Engineer is a student or recent graduate who assists in designing and developing digital integrated circuits (ICs) using hardware description languages like Verilog or VHDL. They work under the guidance of senior engineers to create, simulate, and verify RTL code for ASIC (Application Specific Integrated Circuit) projects. The role provides hands-on experience with the chip design process, including synthesis, timing analysis, and verification. Interns gain valuable exposure to industry-standard tools and methodologies, helping them prepare for a full-time engineering career.

What is the difference between Internship Asic Rtl Design Engineer vs Asic Verification Engineer?

AspectInternship Asic Rtl Design EngineerAsic Verification Engineer
CredentialsTypically pursuing or recently completed a degree in Electrical Engineering or Computer EngineeringSimilar educational background, often with additional coursework in verification methodologies
Work EnvironmentInternship setting, supervised, focused on learning and assisting in RTL design tasksFull-time role, focused on testing and verifying RTL designs
Industry UsageUsed in semiconductor and chip design companies during early career stagesCommon in companies developing complex integrated circuits and chips

The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Florida? The most popular types of Asic Rtl Design Engineer jobs in Florida are:
What job categories do people searching Internship Asic Rtl Design Engineer jobs in Florida look for? The top searched job categories for Internship Asic Rtl Design Engineer jobs in Florida are:
What cities in Florida are hiring for Internship Asic Rtl Design Engineer jobs? Cities in Florida with the most Internship Asic Rtl Design Engineer job openings:
Infographic showing various Internship Asic Rtl Design Engineer job openings in Florida as of May 2026, with employment types broken down into 10% Internship, and 90% Full Time. Highlights an 100% In-person job distribution.
ASIC & FPGA Design Engineer Sr

ASIC & FPGA Design Engineer Sr

Lockheed Martin

Orlando, FL • On-site

$114.80K - $158.20K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 18 days ago


Lockheed Martin rating

8.2

Company rating: 8.2 out of 10

Based on 375 frontline employees who took The Breakroom Quiz

31st of 59 rated aerospace companies


Job description

Job Description
You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team within Missiles & Fire Control (MFC). Our team delivers the digital heart beat that powers the Next Generation Short Range Interceptor (NGSRI), turning system level performance and safety goals into reliable, production ready FPGA hardware for the United States and allied forces.
What You Will Be Doing
As the senior ASIC & FPGA designer you will own the full lifecycle of the CLA FPGA-from high level architecture through release ready documentation-while mentoring junior talent and partnering with a broad set of cross functional experts. Your responsibilities will include:
• Defining FPGA architecture and drafting design specifications; writing clean RTL in VHDL/Verilog/SystemVerilog that satisfies performance, power, and reliability targets.
• Developing synthesis, place and route, and timing closure strategies to guarantee deterministic operation on the chosen FPGA families.
• Building comprehensive test plans, simulation models, and verification environments (UVM, SystemC, Python based testbenches) to prove functional correctness and timing margins.
• Leading hardware in the loop (HIL) tests, board level debugging, and subsystem integration activities.
• Translating system level performance, safety, and reliability requirements into detailed FPGA architectures and resource utilization studies.
• Conducting timing analysis, power budgeting, and device selection optimization.
• Managing configuration control with GitLab (or equivalent), maintaining version controlled repositories, and ensuring full traceability of all design artifacts.
• Producing complete design packages-specifications, test plans, verification reports, and release documentation-compliant with aerospace and Lockheed Martin command media standards.
• Collaborating with systems, software, hardware, mechanical, test, manufacturing, and quality teams to keep the program on schedule and within performance envelopes.
• Mentoring junior engineers, championing best practice FPGA development, verification, and configuration management processes.
Why Join Us
Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you.
We offer flexible work schedules to comprehensive benefits investing in your future and security, Learn more about Lockheed Martin's comprehensive benefits package here.
Further Information About This Opportunity:
This position is in Orlando. Discover more about our Orlando, Florida location.
MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. The selected candidate must be able to obtain a secret clearance
Basic Qualifications
• Bachelor of Science degree in Electrical Engineering or a closely related STEM field from an accredited university; Master's degree preferred
• Minimum 3 years of professional experience with FPGA design and simulation verification or a related discipline
• Proficiency in HDL programming with VHDL, Verilog, and/or SystemVerilog
• Experience with Xilinx/AMD toolsets (Vivado, Vitis, Vitis HLS) and UltraScale design methodology
• Experience with FPGA simulation tools such as Synopsys VCS
• Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity
• Experience with high-speed interfaces such as AXI, Ethernet, TCP/IP, PCIe, and serial protocols
• Practical laboratory debug experience with high-speed oscilloscopes, spectrum analyzers, and signal generators
• Familiarity with Synopsys EDA tools
• Must be a US Citizen; must possess or be able to obtain a DoD Secret clearance"
Desired skills
• LM/MFC design experience and missile program experience
• Experience with SystemVerilog, Verilog, C/C++, MATLAB/Simulink; Synopsys Synplify, Synopsys VCS, NCSim, ChipScope tool sets
• Experience with Xilinx/AMD and MicroSemi/Microchip part families, internal FPGA fabric and IP
• Experience implementing NSA algorithms (e.g., AES, counter mode)
• Experience managing configuration control (GitLab preferred)
• Experience with Vivado and Vitis FPGA toolsets
• Experience with UVM and Simulink/HDL Coder integration
• Comfortable using digital oscilloscopes, spectrum analyzers, power meters, signal generators, and other test equipment
• Experience with troubleshooting and debugging at board level, including FPGA validation
• Experience in full ASIC/FPGA lifecycle (architecture, design, simulation, verification, validation, integration & test)
• Strong communication, collaboration, and presentation abilities
• Controls and digital loop-closure application knowledge
• Networking proficiency with Ethernet switches, routers, firewalls, and debugging tools (tcpdump, Wireshark)
• Active DoD Secret or Top Secret clearance
EEO
Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics.
The application window will close in 90 days; applicants are encouraged to apply within 5 - 30 days of the requisition posting date in order to receive optimal consideration.
*
At Lockheed Martin, we use our passion for purposeful innovation to help keep people safe and solve the world's most complex challenges. Our people are some of the greatest minds in the industry and truly make Lockheed Martin a great place to work.
With our employees as our priority, we provide diverse career opportunities designed to propel, develop, and boost agility. Our flexible schedules, competitive pay, and comprehensive benefits enable our employees to live a healthy, fulfilling life at and outside of work. We place an emphasis on empowering our employees by fostering an inclusive environment built upon integrity and corporate responsibility.
If this sounds like a culture you connect with, you're invited to apply for this role. Or, if you are unsure whether your experience aligns with the requirements of this position, we encourage you to search on Lockheed Martin Jobs, and apply for roles that align with your qualifications.
Other Important Information
By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings.
Ability to work remotely
Part-time Remote Telework: The employee selected for this position will work part of their work schedule remotely and part of their work schedule at a designated Lockheed Martin facility. The specific weekly schedule will be discussed during the hiring process.
Work Schedule Information
Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees. Schedules range from standard 40 hours over a five day work week while others may be condensed. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits.
National Pay Statement
Pay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $101,000 - $178,135. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
(Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.
This position is incentive plan eligible.
Premium Pay Statement
Pay Rate: The annual base salary range for this position in most major metropolitan areas in California, Massachusetts, and New York is $116,200 - $201,365. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
This position is incentive plan eligible.

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About Lockheed Martin

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As a global security and aerospace company, the majority of Lockheed Martin's business is with the U.S. Department of Defense and U.S. federal government agencies.The remaining portion of Lockheed Martin's business is comprised of international government and commercial sales of products, services and platforms.

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Bethesda, MD, US

Year founded

1912