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Ic Packaging Engineer Jobs (NOW HIRING)

Entrada Ventures

Principal Packaging Engineer

Palo Alto, CA · On-site

$180 - $240/hr

What We Need A Senior Packaging Engineer responsible for architecting and delivering advanced multi‑die IC packages for high‑performance AI accelerators. This role focuses on package architecture ...

New

Apple, Inc.

Package Integration Engineer

San Francisco, CA · On-site

$122K - $164K/yr

Looking for a senior level IC packaging engineer to develop exciting new products. You will be responsible providing Custom Silicon packaging solutions in a module/system for various consumer markets.

Apple

Package Integration Engineer

Bodega Bay, CA

$184K - $324K/yr

Looking for a senior level IC packaging engineer to develop exciting new products. You will be responsible providing Custom Silicon packaging solutions in a module/system for various consumer markets.

Apple

IC Packaging Simulation Engineer

Austin, TX · On-site

We are looking for a self-motivated Packaging Simulation Engineer who is proficient in FEM ... Description • In this role, you will be working on stress and deformation simulation of IC ...

Apple

IC Packaging Simulation Engineer

Austin, TX · On-site

We are looking for a self-motivated Packaging Simulation Engineer who is proficient in FEM ... Description In this role, you will be working on stress and deformation simulation of IC packages ...

Apple Inc.

IC Packaging Simulation Engineer

Austin, TX · On-site

$90 - $120/hr

We are looking for a self-motivated Packaging Simulation Engineer who is proficient in FEM ... In this role, you will be working on stress and deformation simulation of IC packages to provide a ...

Apple

Packaging Assembly Engineer

Austin, TX · On-site

We are looking for a hardworking and passionate IC Packaging Assembly Engineer to join our team. In this highly visible role, you will own development, optimization and sustaining the advanced flip ...

Etched

IC Package Engineer

Cupertino, CA · On-site

$2.0K/mo

Leverage advanced packaging technologies, with expertise in CoWoS (Chip-on-Wafer-on-Substrate) and heterogeneous integration techniques, to design both open and closed packages, incorporating ...

Etched

IC Package Engineer

Cupertino, CA · On-site

$2.0K/mo

Leverage advanced packaging technologies, with expertise in CoWoS (Chip-on-Wafer-on-Substrate) and heterogeneous integration techniques, to design both open and closed packages, incorporating ...

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IC Packaging Engineer information

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How much do ic packaging engineer jobs pay per hour?

As of Aug 20, 2026, the average hourly pay for ic packaging engineer in the United States is $42.37, according to ZipRecruiter salary data. Most workers in this role earn between $32.69 and $49.28 per hour, depending on experience, location, and employer.

What is an IC Packaging Engineer?

An IC Packaging Engineer is responsible for designing and developing semiconductor packaging solutions to ensure the performance, reliability, and manufacturability of integrated circuits (ICs). They work closely with design, manufacturing, and testing teams to create packaging that meets thermal, electrical, and mechanical requirements. Their role includes material selection, process optimization, and collaboration with suppliers to enhance packaging efficiency and cost-effectiveness.

What does an IC Packaging Engineer do?

IC Packaging Engineers typically focus on designing, developing, and testing packaging solutions for integrated circuits, working closely with cross-functional teams including design, process, and reliability engineers. Day-to-day tasks may include creating layout drawings, performing simulations, evaluating material choices, resolving technical challenges during assembly, and interacting with manufacturing partners. They are responsible for ensuring the package design meets performance, cost, and reliability requirements set by customers or the market. This role often involves regular collaboration and problem-solving to meet tight development timelines and maintain product quality.

What are the key skills and qualifications needed to thrive as an IC Packaging Engineer?

To thrive as an IC Packaging Engineer, you need a robust background in materials science, semiconductor device physics, and mechanical or electrical engineering, typically supported by a relevant engineering degree. Proficiency in design and simulation tools like Cadence, ANSYS, and industry standards such as JEDEC, along with knowledge of thermal, electrical, and reliability testing methods, is essential. Effective communication, cross-functional teamwork, and strong problem-solving skills help you excel in project-based environments. These qualifications are critical for delivering reliable, high-performance integrated circuit packages essential to the semiconductor industry's success.

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IC Packaging Engineer jobs near you
Infographic showing various Ic Packaging Engineer job openings in the United States as of August 2026, with employment types broken down into 94% Full Time, 2% Part Time, and 4% Contract. Highlights an 85% Physical, 6% Hybrid, and 9% Remote job distribution, with an average salary of $88,120 per year, or $42.4 per hour.

Principal Packaging Engineer

Entrada Ventures

Palo Alto, CA • On-site

$180 - $240/hr

Other

Retirement

This job post has expired today. Applications are no longer accepted.

Job description

What We Need

A Senior Packaging Engineer responsible for architecting and delivering advanced multi‑die IC packages for high‑performance AI accelerators. This role focuses on package architecture, substrate design, manufacturability, and vendor engagement.

Key Responsibilities
  • Select and design optimal multi‑die package types (MCM, 2.5D, 3D, fan‑out, CoWoS, InFO, CPC, CPO) balancing electrical performance, thermal behavior, cost, and manufacturability.
  • Define package specifications, bump map and ball map, interposer requirements, and mechanical constraints.
  • Define substrate stack‑ups, bump pitch, ball pitch, routing, via structures, and material choices for performance and manufacturability.
  • Perform high‑speed signal escaping, routing and power distribution network design.
  • Manage subcontractors and work directly with TSMC and/or OSAT on bumping, substrate options, and advanced packaging flows.
  • Partner with IC design, physical design, SI/PI, and board teams to ensure package requirements meet system‑level needs.
  • Evaluate emerging packaging technologies and drive adoption for next‑generation products.
  • Support package‑level bring‑up, failure analysis, debug, and qualification.
Required Skills & Qualifications
  • B.S./M.S. in Electrical Engineering or related field.
  • Experience with multi‑die package design and UCIe (AP/SP) integration.
  • Understanding of substrate materials, stack‑ups, and mechanical constraints.
  • Familiarity with SI/PI concepts to collaborate effectively with electrical teams.
  • Experience managing packaging subcontractors.
  • Experience interfacing with TSMC/OSAT for bumping and packaging options.
  • Knowledge of package modeling tools (HFSS, Sigrity, or similar) is a plus.
Compensation

Target base salary for this role is $180,000–$240,000 per year + meaningful equity + benefits + 401k. Our salary ranges are determined by role, level, experience, and location.

Equal Opportunity Employer

We are an equal opportunity employer. We value a range of perspectives and experiences and make employment decisions based on merit and business needs. We do not discriminate on the basis of legally protected characteristics.

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