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Full Time Physical Verification Engineer Jobs in Arizona

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Full Time Physical Verification Engineer information

What is the difference between Full Time Physical Verification Engineer vs Physical Design Engineer?

AspectFull Time Physical Verification EngineerPhysical Design Engineer
Primary RoleVerifies physical layouts for manufacturability and design rule complianceCreates and optimizes physical layouts for chip design
Skills & CertificationsKnowledge of DRC, LVS, parasitic extraction; familiarity with EDA toolsExperience with placement, routing, and physical implementation tools
Work EnvironmentDesign verification teams in semiconductor or chip design companiesPhysical implementation teams in IC design firms

While both roles focus on physical aspects of chip design, the Full Time Physical Verification Engineer primarily verifies layouts for correctness, whereas the Physical Design Engineer focuses on creating and optimizing the physical layout. Both roles require similar technical skills and often collaborate closely during the chip development process.

What does a full time physical verification engineer do?

A Full Time Physical Verification Engineer is responsible for ensuring that integrated circuit (IC) designs meet all manufacturing requirements before production. Their main tasks include running design rule checks (DRC), layout versus schematic (LVS) checks, and electrical rule checks (ERC) to verify that the physical layout matches the intended circuit and adheres to foundry specifications. They work closely with design, layout, and fabrication teams to identify and resolve any issues that could affect chip functionality or yield. Attention to detail and proficiency with electronic design automation (EDA) tools are essential for this role.

What are some common challenges faced by full time physical verification engineers, and how can they be addressed?

Full Time Physical Verification Engineers often encounter challenges such as managing tight project deadlines, debugging complex design rule violations, and ensuring seamless communication with design and layout teams. Staying updated with the latest verification tools and methodologies is essential to efficiently identify and resolve errors. Proactive collaboration and regular cross-team meetings can help address misunderstandings early, while leveraging automation scripts can reduce repetitive tasks and improve accuracy. Continuous learning and seeking feedback from peers are effective strategies to overcome these challenges.

What are the key skills and qualifications needed to thrive as a full time physical verification engineer, and why are they important?

To thrive as a Full Time Physical Verification Engineer, you need expertise in VLSI design, semiconductor physics, and a degree in electrical or electronics engineering. Familiarity with EDA tools such as Cadence, Synopsys, or Mentor Graphics, along with knowledge of DRC, LVS, and parasitic extraction checks, is essential. Strong problem-solving skills, attention to detail, and effective communication help engineers collaborate with design teams and resolve complex verification issues. These skills ensure the accuracy and manufacturability of integrated circuit designs, which is critical for successful chip production.

What are popular job titles related to Full Time Physical Verification Engineer jobs in Arizona?

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What job categories do people searching Full Time Physical Verification Engineer jobs in Arizona look for?

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Full Time Physical Verification Engineer jobs near you
Infographic showing various Full Time Physical Verification Engineer job openings in Arizona as of August 2026, with employment types broken down into 100% Full Time. Highlights an 100% In-person job distribution.

Principal Engineer - Physical Design

Microchip Technology

Chandler, AZ

Full-time

Re-posted 17 hours ago

Microchip Technology rating

8.0

Company rating: 8.0 out of 10

Based on 33 frontline employees who took The Breakroom Quiz

58th of 157 rated electronics manufacturers

Job description

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.

People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.

Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.

Visit our careers page to see what exciting opportunities and company perks await!

Job Description:

Microchip's CAD Physical Design (PD) team is looking for a Principal Engineer to work on Full Chip APR/Physical Implementation (Netlist-to-GDSII). In this role you will be working as part of a worldwide team in all areas of Physical Implementation including APR of hierarchical, low power, multi-mode, multi corner mixed signal designs.

Requirements/Qualifications:

  • Bachelor's or Masters Degree in Electrical / Electronics Engineering with 10+ years of relevant experience
  • Hands-on experience in all aspects of physical design flows such as floor planning, placement optimization,
  • clock tree synthesis, routing, crosstalk avoidance and physical verification
  • Advanced knowledge of place and route methodologies.
  • Recent experience with leading full chip Physical Design activities.
  • Advanced knowledge of VLSI logic principles, clock structures, and design timing closure.
  • Advanced knowledge of sign-off tools for Static Timing Analysis, Formal Equivalence, Parasitic Extraction,
  • Power Integrity, and Physical Verification is required
  • Knowledge of and experience in UPF and Low Power design practices throughout entire physical design flow.
  • Daily use of ICC/ICC2 or Innovus is preferred.
  • Experience with 40nm or 28nm technologies is required, 16nm or smaller technology preferred
  • Proficiency in Tcl and Perl scripting is essential.
  • Excellent written and verbal communication skills.
  • Excellent problem-solving and debugging skills.
  • Self-motivated team player that can collaborate with multiple teams across a geographically diverse
  • company to achieve desired design goals is crucial.

Travel Time:

0% - 25%

Physical Attributes:

Hearing, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements:

80% sitting, 10% walking, 10% standing

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.

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