Freelance Asic Rtl Design Engineer Jobs in Phoenix, AZ

Job Details:Job Description: 

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.

The Role and Impact:
Intel is seeking a highly skilled and motivated CPU Logic Design Engineer to join our innovative team. As a CPU Logic Design Engineer, you will play a pivotal role in designing and developing the logic architecture for CPUs that serve as the backbone of our cutting-edge technologies. Your contributions will directly impact Intel's ability to deliver high-performance, power-efficient processors that drive the future of computing. This is an opportunity to shape the design of CPUs by employing advanced strategies and ensuring robust integration in system-on-chip (SoC) designs. Join us in transforming the world through technology while honing your expertise in logic design and microarchitecture development.
Key Responsibilities:

• Develop the logic design and register transfer level (RTL) coding for CPU features.
• Perform simulation and implement strategies to meet power, performance, area, and timing goals, ensuring design integrity.
• Collaborate on defining architecture and microarchitecture features of the CPU being designed.
• Optimize and debug logic designs using advanced tools and methods.
• Review and contribute to verification plans to ensure correctness of CPU design features.
• Resolve failing RTL tests by implementing corrective measures, ensuring feature correctness and functionality.
• Document micro architectural specifications (MAS) for CPU features.
• Support SoC customers to ensure high-quality integration of CPU blocks in chip designs.
• Someone who can understand how to achieve results in complex multi-site team environment

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences

Minimum Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
• 6+ years of experience with a Bachelor's degree, 4+ years with a Master's degree, or 2+ years with a PhD in CPU logic design, RTL coding, or microarchitecture development.
• Logic design and RTL coding techniques. Expertise in power and performance analysis and optimization.
• Microarchitecture fundamentals and low-power design methodologies.
• Experience with debugging and resolving RTL implementation issues.

Preferred Qualifications:

• Strong communication skills and ability to work collaboratively within cross-functional teams.
• Proven ability to deliver high-quality designs under tight deadlines and dynamic project environments.
• Enthusiasm for innovation and staying ahead of industry trends in CPU design.
• Strong knowledge of CPU architecture (concepts such as caching, pipelining, paging, virtual memory, memory tagging and management) and micro-architecture and RTL environment is essential.
• Demonstrated expertise in understanding the design of complex Intel Architecture CPU, developing and debugging of functional tests in Assembly language in pre-silicon simulation environment are required skills.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Arizona, PhoenixAdditional Locations:Business group:Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.