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Junior Rtl Design Engineer Jobs in Phoenix, AZ (NOW HIRING)

Intel

CPU RTL Design Engineer

Phoenix, AZ · On-site

$141K - $269K/yr

As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL ...

Intel

Senior CPU RTL Design Engineer

Phoenix, AZ · On-site

As a Senior CPU RTL Design Engineer, you will define, develop, and optimize key microarchitectural features that power Intel's next-generation processors. In this role, you will contribute to CPU ...

PowerLattice

Senior Digital Design Engineer

Chandler, AZ · On-site

$150K - $200K/yr

Key Responsibilities Digital Design & RTL Development * Develop microarchitecture for assigned ... Mentor junior engineers and share technical knowledge within the team (Staff level) Qualifications ...

NXP Semiconductors

Sr Digital Design Engineer

Chandler, AZ · On-site

$133K/yr

Drive product execution from concept through RTL development, integration, silicon validation ... Mentor junior engineers and drive continuous improvement in design methodologies, automation flows ...

Cirrus Logic

Digital Design Engineer

Chandler, AZ · On-site

$133K/yr

Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...

Cirrus Logic

Staff Digital Design Engineer

Chandler, AZ · On-site

$133K/yr

Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...

Cirrus Logic

Senior Digital Design Engineer

Chandler, AZ · On-site

$133K/yr

Develop RTL designs using Verilog and support integration into larger SoC environments. * Design ... Degree in Electrical Engineering, Computer Engineering, or a related technical field. * Bachelor ...

FHLB Des Moines

Senior Engineer I- Design

Chandler, AZ · On-site

$110 - $140/hr

This role involves RTL design, functional verification, and contributing to next-generation mixed ... Programming skills in Python; familiarity with TCL or shell scripting * Experience with industry ...

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Junior Rtl Design Engineer information

See Phoenix, AZ salary details

$33.3K

$71.3K

$108.7K

How much do junior rtl design engineer jobs pay per year?

As of Aug 28, 2026, the average yearly pay for junior rtl design engineer in Phoenix, AZ is $71,290.00, according to ZipRecruiter salary data. Most workers in this role earn between $48,200.00 and $79,400.00 per year, depending on experience, location, and employer.

What is a junior RTL design engineer?

Junior RTL Design Engineers are entry-level professionals who work on designing and verifying the Register Transfer Level (RTL) logic for digital integrated circuits. They typically use hardware description languages like Verilog or VHDL to describe and simulate the functionality of hardware blocks according to specifications. Their responsibilities often include coding, simulation, debugging, and collaborating with senior engineers to ensure the design meets performance and functional requirements. This role is crucial in the process of creating chips and digital systems used in various electronic devices.

What are the key skills and qualifications needed to thrive as a junior RTL design engineer?

To thrive as a Junior RTL Design Engineer, a solid background in digital logic design, hardware description languages (such as Verilog or VHDL), and a relevant engineering degree are essential. Experience with simulation and synthesis tools (like ModelSim, Synopsys, or Xilinx Vivado) and a basic understanding of ASIC or FPGA flows are typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help individuals excel in translating specifications into efficient hardware designs. These skills ensure accurate, reliable, and high-performance digital circuit development, which is crucial for meeting project goals and industry standards.

What are some common challenges faced by junior RTL design engineers when transitioning from academic projects to industry roles?

Junior RTL Design Engineers often find the transition from academic projects to industry roles challenging due to the increased complexity and scale of commercial designs. In industry, there is a strong emphasis on meeting strict timing, power, and area requirements, as well as adhering to rigorous verification and documentation standards. Collaboration with verification, physical design, and software teams is essential, and juniors may need to quickly adapt to using industry-standard EDA tools and workflows. Gaining proficiency in debugging and understanding legacy codebases are also typical hurdles. However, most teams provide mentorship and structured onboarding to help new engineers succeed.

What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?

AspectJunior Rtl Design EngineerDigital Design Engineer
Required CredentialsBachelor's in Electrical Engineering or related field; some certificationsBachelor's or higher in Electrical/Electronic Engineering; certifications vary
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
Employer & Industry UsageCommonly employed in chip design, FPGA, ASIC developmentUsed in digital circuit and system design across industries

Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.

What are popular job titles related to Junior Rtl Design Engineer jobs in Phoenix, AZ?

For Junior Rtl Design Engineer jobs in Phoenix, AZ, the most frequently searched job titles are:

What job categories do people searching Junior Rtl Design Engineer jobs in Phoenix, AZ look for?

The top searched job categories for Junior Rtl Design Engineer jobs in Phoenix, AZ are:

Junior Rtl Design Engineer jobs near you

CPU RTL Design Engineer

Phoenix, AZ • On-site

Intel
Manufacturing • 10K+ employees

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

18th of 159 rated electronics manufacturers

Great coworkers

People enjoy working here

Good employer

Learn more about Intelexternal

$141K - $269K/yr

Full-time

Medical, Retirement, PTO

Re-posted 10 days ago

Job description

Job Details:Job Description: 

Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

The Role and Impact:
As a CPU Logic Design Engineer, you will play a critical role in designing and optimizing the logic for Intel's cutting-edge processors. You will drive the development of register transfer level (RTL) code and simulation for the CPU, enabling creation of cell libraries, functional units, and CPU IP blocks for integration into full-chip designs. Your expertise will be pivotal in defining architecture and microarchitecture features, ensuring Intel continues to deliver innovative solutions that lead the industry in performance, energy efficiency, and design integrity. By contributing to the development and optimization of logic structures, you will help create technology that enriches the lives of every person on Earth, while enabling Intel to achieve its broader mission of engineering a brighter future.
Key Responsibilities:

  • Develop and optimize logic design, register transfer level (RTL) coding, and simulation for the CPU.
  • Participate in defining the architecture and microarchitecture features of the CPU design.
  • Write RTL and optimize logic for power, performance, area, and timing goals.
  • Ensure design integrity for physical implementation through effective strategies, tools, and methods.
  • Review verification plans to ensure design features are correctly validated and resolve failing RTL tests.
  • Document microarchitectural specifications (MAS) for the CPU features.
  • Collaborate with SoC customers to ensure seamless integration and high-quality performance of the CPU block.
Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences.

Minimum Qualifications:

Bachelor's degree in electrical engineering, computer engineering, or computer science with 7+ years of relevant experience; OR Master's degree with 5+ years of experience; OR PhD with 2+ years of experience.

  • 7+ years experience in RTL design using Verilog, V2K, or System Verilog, with strong knowledge of hardware modeling and logic debug environments.
  • 5+ years experience with modern energy-efficient and low-power logic design methods, including techniques applicable to high-frequency optimization.
  • 5+ years experience in Cross-clock domain crossings and power aware design.
  • 3+ years experience in scripting languages such as TCL, Perl, or Python.


Preferred Qualifications:

  • Knowledge on CPU power-management namely power/electrical budgeting, dynamic voltage and frequency scaling, thermal, P/C states and reset sequence handling.
  • Comprehensive knowledge of Intel Architecture ISA and system architecture, including x86 assembly language.
  • Experience with high-speed circuit design and optimization, specifically for datapath, circuits, and arrays.
  • Familiarity with circuit planning and timing convergence processes.
  • Ability to leverage broad understanding of CPU architecture to deliver impactful solutions.
  • Proficient with static timing analysis, UPF and lint checks.
  • Good communication skills.


Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Texas, AustinAdditional Locations:US, Arizona, PhoenixBusiness group:Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $141,910.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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