Provide technical leadership and mentorship to junior engineers within the MCU and Edge AI ... Proficiencywith EDA tools for architecture exploration, RTL design, synthesis, and physical ...
Provide technical leadership and mentorship to junior engineers within the MCU and Edge AI ... Proficiencywith EDA tools for architecture exploration, RTL design, synthesis, and physical ...
The engineer will manage complex projects from concept through production, mentor junior engineers ... In addition, the Senior Connector Design Engineer will help define product specifications and ...
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The engineer will manage complex projects from concept through production, mentor junior engineers ... In addition, the Senior Connector Design Engineer will help define product specifications and ...
The engineer will manage complex projects from concept through production, mentor junior engineers ... In addition, the Senior Connector Design Engineer will help define product specifications and ...
The engineer will manage complex projects from concept through production, mentor junior engineers ... In addition, the Senior Connector Design Engineer will help define product specifications and ...
Multi-state design firm is seeking a Senior Site Design Engineer for their team in Phoenix ... Mentor/train junior staff * Review contracts with support of administration * Promote efficiencies ...
Quick apply
Multi-state design firm is seeking a Senior Site Design Engineer for their team in Phoenix ... Mentor/train junior staff * Review contracts with support of administration * Promote efficiencies ...
Senior FPGA Design Engineer
Chandler, AZ · On-site
$101K - $136K/yr
Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation ... Capable of creating RTL simulations to identify and resolve most issues before hardware tests
Quick apply
Senior FPGA Design Engineer
Chandler, AZ · On-site
$101K - $136K/yr
Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation ... Capable of creating RTL simulations to identify and resolve most issues before hardware tests
Senior Mechanical Design Engineer
Chandler, AZ · On-site
$89K - $123K/yr
Mechanical Design Engineer (Automation/Critical Design/SolidWorks) Are you a hands-on Mechanical ... Mentor junior designers and provide technical guidance Requirements * 10+ years of mechanical ...
Senior Mechanical Design Engineer
Chandler, AZ · On-site
$89K - $123K/yr
Mechanical Design Engineer (Automation/Critical Design/SolidWorks) Are you a hands-on Mechanical ... Mentor junior designers and provide technical guidance Requirements * 10+ years of mechanical ...
Senior Design Verification Engineer
Tempe, AZ · On-site
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Senior Design Verification Engineer
Tempe, AZ · On-site
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Mentor junior engineers and support internal concurrent design efforts while contributing to design standards, manufacturability considerations, and internal review processes. * Generate required ...
Mentor junior engineers and support internal concurrent design efforts while contributing to design standards, manufacturability considerations, and internal review processes. * Generate required ...
Review and, as assigned, supervise the project work of junior engineers. * Perform other duties as required. #LI-TM1 #LI-Hybrid Skills & Abilities * Strong knowledge of electrical engineering design ...
Review and, as assigned, supervise the project work of junior engineers. * Perform other duties as required. #LI-TM1 #LI-Hybrid Skills & Abilities * Strong knowledge of electrical engineering design ...
As a Staff Design Engineer, your job will entail the following: * Own design planning and ... Exposure to RTL compilation and Synthesis flow including understanding of Verilog/System Verilog is ...
As a Staff Design Engineer, your job will entail the following: * Own design planning and ... Exposure to RTL compilation and Synthesis flow including understanding of Verilog/System Verilog is ...
Senior Mechanical Design Engineer
Chandler, AZ · On-site
$89K - $123K/yr
Senior Mechanical Design Engineer (Automation / Critical Design / SolidWorks) Design the Next ... Mentor junior engineers and help establish engineering standards and best practices. Required ...
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Senior Mechanical Design Engineer
Chandler, AZ · On-site
$89K - $123K/yr
Senior Mechanical Design Engineer (Automation / Critical Design / SolidWorks) Design the Next ... Mentor junior engineers and help establish engineering standards and best practices. Required ...
Senior CPU Design Verification Engineer
Phoenix, AZ · On-site
$135K - $164K/yr
Debug and rootcause complex RTL, microarchitecture, and integration issues; drive issues to ... physical design engineers to improve design quality and verification effectiveness. * Influence ...
Senior CPU Design Verification Engineer
Phoenix, AZ · On-site
$135K - $164K/yr
Debug and rootcause complex RTL, microarchitecture, and integration issues; drive issues to ... physical design engineers to improve design quality and verification effectiveness. * Influence ...
Senior Design Verification Engineer
Tempe, AZ · On-site
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Senior Design Verification Engineer
Tempe, AZ · On-site
$193K - $290K/yr
Architecting Design Verification environments for ASICs and FPGAs ... Working with RTL, System and software engineers to determine appropriate coverage closure for chip ...
Senior Analog Design Engineer
Phoenix, AZ · On-site
$200K/yr
Mentor junior engineers and provide technical guidance. Collaborate with cross-functional teams including architecture, logic, verification, physical design, layout, post-silicon manufacturing and ...
Senior Analog Design Engineer
Phoenix, AZ · On-site
$200K/yr
Mentor junior engineers and provide technical guidance. Collaborate with cross-functional teams including architecture, logic, verification, physical design, layout, post-silicon manufacturing and ...
Senior Analog Design Engineer
Phoenix, AZ · On-site
$200K/yr
Technical Leadership • Lead analog design projects from specification to silicon validation. • Mentor junior engineers and provide technical guidance. • Collaborate with cross-functional teams ...
Senior Analog Design Engineer
Phoenix, AZ · On-site
$200K/yr
Technical Leadership • Lead analog design projects from specification to silicon validation. • Mentor junior engineers and provide technical guidance. • Collaborate with cross-functional teams ...
RF Design Engineer
Chandler, AZ · On-site
Mentor junior engineers and support internal concurrent design efforts while contributing to design standards, manufacturability considerations, and internal review processes. * Generate required ...
RF Design Engineer
Chandler, AZ · On-site
Mentor junior engineers and support internal concurrent design efforts while contributing to design standards, manufacturability considerations, and internal review processes. * Generate required ...
Lead Mechanical Design Engineer
Phoenix, AZ · Hybrid
$75 - $82/hr
You'll collaborate with multidisciplinary engineering teams, mentor junior engineers, and drive ... Lead the design and development of advanced aerospace components and rotating systems from concept ...
Quick apply
Lead Mechanical Design Engineer
Phoenix, AZ · Hybrid
$75 - $82/hr
You'll collaborate with multidisciplinary engineering teams, mentor junior engineers, and drive ... Lead the design and development of advanced aerospace components and rotating systems from concept ...
You will also serve as a technical mentor, supporting the growth of junior engineers and ... Lead the design and development of advanced hardware systems from concept through production.
Quick apply
You will also serve as a technical mentor, supporting the growth of junior engineers and ... Lead the design and development of advanced hardware systems from concept through production.
You will also serve as a technical mentor, supporting the growth of junior engineers and ... Lead the design and development of advanced hardware systems from concept through production.
Quick apply
You will also serve as a technical mentor, supporting the growth of junior engineers and ... Lead the design and development of advanced hardware systems from concept through production.
You will also serve as a technical mentor, supporting the growth of junior engineers and ... Lead the design and development of advanced hardware systems from concept through production.
Quick apply
You will also serve as a technical mentor, supporting the growth of junior engineers and ... Lead the design and development of advanced hardware systems from concept through production.
Junior Rtl Design Engineer information
See Phoenix, AZ salary details
$33.3K - $40.1K
3% of jobs
$40.1K - $47K
20% of jobs
$48.5K is the 25th percentile. Wages below this are outliers.
$47K - $53.8K
7% of jobs
$53.8K - $60.7K
6% of jobs
$60.7K - $67.6K
12% of jobs
The median wage is $68K / yr.
$67.6K - $74.4K
17% of jobs
$78.1K is the 75th percentile. Wages above this are outliers.
$74.4K - $81.3K
17% of jobs
$81.3K - $88.1K
7% of jobs
$88.1K - $95K
4% of jobs
$95K - $101.9K
3% of jobs
$101.9K - $108.7K
2% of jobs
$33.3K
$71.3K
$108.7K
How much do junior rtl design engineer jobs pay per year?
What are the key skills and qualifications needed to thrive as a junior RTL design engineer?
What is a junior RTL design engineer?
What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?
| Aspect | Junior Rtl Design Engineer | Digital Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's in Electrical Engineering or related field; some certifications | Bachelor's or higher in Electrical/Electronic Engineering; certifications vary |
| Work Environment | Design teams in semiconductor or electronics companies | Design and development teams in similar industries |
| Employer & Industry Usage | Commonly employed in chip design, FPGA, ASIC development | Used in digital circuit and system design across industries |
Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.
What are some common challenges faced by junior RTL design engineers when transitioning from academic projects to industry roles?
Microchip Technology rating
8.0
Based on 33 frontline employees who took The Breakroom Quiz
57th of 156 rated electronics manufacturers
Job description
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment, respect, diversity, and communication? How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization? We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our Vision, Mission, and 11 Guiding Values; we affectionately refer to it as the Aggregate System and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo; we did not achieve record revenue and over 30 years of quarterly profitability without a great team dedicated to empowering innovation. People like you.
Visit our careers page to see what exciting opportunities and company perks await!
Job Description:
Microchip Technology's MCU Business Unit is at the forefront of Edge AI innovation, delivering production-ready, full-stack solutions that bring intelligent real-time decision-making to industrial, automotive, data center, and consumer IoT networks.
We are seeking an experiencedTechnical Staff Engineerto drive chiplet-based architecture definition and advanced-node product research for our next-generation microcontrollers. This senior-level role will work closely with theotherbusiness unitsand cross-functional teams to align chiplet definitions with platform, technology, and product requirements.
As chiplet technology revolutionizes semiconductor design by enabling smaller, specialized dies to be co-packaged for enhanced performance and reduced manufacturing costs, this role will be instrumental in defining architectures thatoptimizepower, performance, area, and cost for MCU-class edge AI applications.
Define and drive chiplet-based architectures for edge AI microcontroller platforms, including specification of chiplet boundaries, interfaces, power domains, and integration strategies thatoptimize forcost, performance, and manufacturability.
Collaborate closely with theanalogbusiness unit to align on chiplet definitions, die-to-die interface specifications, packaging requirements, and integration roadmaps ensuring consistency across platform and product lines.
Perform comprehensive architectural trade-off analysis tooptimizepower, performance, area, and cost for MCU-class products,utilizingmodeling, simulation, and benchmarking tovalidatedesign decisions against product requirements.
Conduct advanced-node product research, feasibility studies, and technology definition activities including evaluation of process capabilities, design rule impacts, and technology-specific optimization opportunities for edge AI workloads.
Develop andoptimizeend-to-end advanced-node design flows for high-volume MCU products, working with EDA vendors and internal CAD teams toestablishrobust methodologies for synthesis, placement, routing, timing closure, and verification.
Work cross-functionally with AI accelerator, CPU core, memory subsystem, embedded software, advanced packaging, and manufacturing teams to ensure holistic system optimization and successful product delivery.
Support architecture reviews, technical alignment meetings, and product definition milestones by preparing technical presentations, documentation, and recommendations for executive and engineering audiences.
Provide technical leadership and mentorship to junior engineers within the MCU and Edge AI engineering teams, fostering a culture of innovation, technical excellence, and continuous learning.
Requirements/Qualifications:
Required QualificationsBachelors Degree in Electrical or Computer Engineering (or similar degree),Masters Degreepreferred.
Minimum of 10+ years of relevant experience with Verilog/SystemVerilogand/or VHDL.
Strong knowledge of chiplet-based or modular architectures and system-level integration, including understanding of die-to-die interconnect standards and 2.5D integration techniques.
Hands-on experience with advanced-nodeFinFETtechnology nodes and associated design flows.
Possessexcellent analytical and problem-solving skills.
Excellent communication and documentation skills (verbal and written).
Proficiencywith EDA tools for architecture exploration, RTL design, synthesis, and physical implementation.
Experience with hardware description languages (Verilog,SystemVerilog, VHDL) and scripting languages (Python,Tcl, Perl) for design automation.
Experience working with cross-business-unit teams on shared IP, chiplet definitions, or platform architectures.
Background in edge AI acceleration, digital signal processors, or embedded machine learning inference engines.
Proventrack recordin high-volume, cost-sensitive MCU product development from architecture definition through production.
Familiarity with silicon bring-up, validation, debug, and production lifecycle support activities.
Knowledge of UCIe (Universal Chiplet Interconnect Express) or other chiplet interface standards and their implementation.
Experience with advanced nodes (e.g., 7nm-class and beyond) and roadmap planning.
Travel Time:
0% - 25%Physical Attributes:
Hearing, Seeing, Talking, Works Alone, Works Around OthersPhysical Requirements:
90% Sitting, 10% Standing/WalkingMicrochip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.
For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.
To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.
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About Microchip
Sourced by ZipRecruiter
Industry
It services
Company size
10,000+ Employees
Headquarters location
Chandler, AZ, US
Year founded
1989