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Freelance Asic Rtl Design Engineer Jobs in Tucson, AZ

GuideTech LLC

FPGA Design Engineer

Tucson, AZ · On-site

$116K - $160K/yr

Develop RTL and support simulation, synthesis, place and route, timing closure, hardware ... Computer Engineering, or a related technical field. * 8+ years of professional FPGA design and ...

GuideTech LLC

FPGA Design Engineer

Tucson, AZ · On-site

$116K - $160K/yr

Develop RTL and support simulation, synthesis, place and route, timing closure, hardware ... Computer Engineering, or a related technical field. * 8+ years of professional FPGA design and ...

GuideTech Open Roles

FPGA Design Engineer

Tucson, AZ · On-site

$116K - $160K/yr

Develop RTL and support simulation, synthesis, place and route, timing closure, hardware ... Computer Engineering, or a related technical field. * 8+ years of professional FPGA design and ...

Raytheon

Senior FPGA Design Engineer

Tucson, AZ

$116K - $160K/yr

As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...

Prattwhitney

Senior FPGA Design Engineer

Tucson, AZ · On-site

$86.80 - $165.20/hr

Lead small teams and mentor junior engineers. * Support internal and external technical reviews ... Experience with FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification ...

Raytheon

Senior FPGA Design Engineer

Tucson, AZ

$116K - $160K/yr

As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...

GuideTech Open Roles

Board Design Engineer

Tucson, AZ · On-site

RTL/VHDL experience is a plus. * Experience with high-speed interfaces such as SPI, I2C, CAN, USB ... Familiarity with power design and embedded system integration. * Power electronics, motor control ...

GuideTech LLC

Board Design Engineer

Tucson, AZ · On-site

RTL/VHDL experience is a plus. * Experience with high-speed interfaces such as SPI, I2C, CAN, USB ... Familiarity with power design and embedded system integration. * Power electronics, motor control ...

GuideTech LLC

Board Design Engineer

Tucson, AZ · Hybrid

RTL/VHDL experience is a plus. * Experience with high-speed interfaces such as SPI, I2C, CAN, USB ... Familiarity with power design and embedded system integration. * Power electronics, motor control ...

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Freelance Asic Rtl Design Engineer information

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$14

$45

$125

How much do freelance asic rtl design engineer jobs pay per hour?

As of Aug 11, 2026, the average hourly pay for freelance asic rtl design engineer in Tucson, AZ is $45.11, according to ZipRecruiter salary data. Most workers in this role earn between $22.93 and $58.41 per hour, depending on experience, location, and employer.

How much does a Freelance ASIC RTL Design Engineer make?

Freelance ASIC RTL Design Engineers typically earn between $50 and $150 per hour, depending on experience, project complexity, and location. Rates can vary based on expertise in hardware description languages like Verilog or VHDL and familiarity with FPGA or ASIC design tools.

Are freelance ASIC RTL design engineers in demand?

Freelance ASIC RTL design engineers are in demand due to the growing need for custom chip development in industries like telecommunications, AI, and consumer electronics. Skills in hardware description languages such as Verilog or VHDL, along with experience in FPGA prototyping, enhance employability in this competitive field.
What are the most commonly searched types of Asic Rtl Design Engineer jobs in Tucson, AZ? The most popular types of Asic Rtl Design Engineer jobs in Tucson, AZ are:
What job categories do people searching Freelance Asic Rtl Design Engineer jobs in Tucson, AZ look for? The top searched job categories for Freelance Asic Rtl Design Engineer jobs in Tucson, AZ are:
Freelance Asic Rtl Design Engineer jobs near you
Infographic showing various Freelance Asic Rtl Design Engineer job openings in Tucson, AZ as of August 2026, with employment types broken down into 50% Full Time, and 50% Contract. Highlights an 100% In-person job distribution, with an average salary of $93,820 per year, or $45.1 per hour.

FPGA Design Engineer

GuideTech LLC

Tucson, AZ • On-site

$116K - $160K/yr

Full-time

Re-posted 17 days ago

Job description

Job Type
Full-time
Description
Location: Tucson, AZ
GuideTech, a subsidiary of Palladyne AI (NASDAQ: PDYN), builds high-performance avionics and autonomy software for aerospace, space, and defense systems. We support a wide array of vehicles, from small multi-rotors and heavy lift UAVs to unmanned fighter jets, launch vehicles, spacecraft, re-entry vehicles, missiles, and counter-UAS interceptors. Our culture is grounded in trust, integrity, and a shared commitment to meaningful work.
Position Summary
We're seeking an experienced FPGA Design Engineer to develop FPGA solutions for next-generation avionics systems. In this role, you'll work on mission-critical aerospace and defense technologies, collaborating with hardware, software, systems, and test engineering teams to bring FPGA designs from concept through hardware validation.
What You'll Do
  • Design and implement FPGA solutions using VHDL.
  • Develop RTL and support simulation, synthesis, place and route, timing closure, hardware verification, and implementation.
  • Collaborate with cross-functional engineering teams to integrate FPGA designs into avionics hardware.
  • Support board bring-up, debugging, and hardware validation.
  • Participate in design reviews and technical documentation.

Requirements
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • 8+ years of professional FPGA design and development experience.
  • Strong RTL design experience using VHDL.
  • Experience with the complete FPGA development lifecycle, including RTL design, simulation, synthesis, place and route, timing closure, implementation, and hardware verification.
  • Experience developing FPGA solutions using AMD/Xilinx devices and the Vivado tool suite.
  • Strong understanding of digital logic design, hardware architecture, and hardware/software interaction.
  • Ability to read and understand electrical schematics.
  • Experience using laboratory equipment, including oscilloscopes, spectrum analyzers, signal sources, and power supplies.
  • Strong verbal and written communication skills with the ability to collaborate across multidisciplinary engineering teams.
  • Experience with Git, ModelSim/QuestaSim, and scripting languages such as Python, Perl, or Ruby.

Work Authorization & Clearance
This position requires the ability to work in the United States without current or future sponsorship.
Depending on the nature of the work, the ability to obtain and maintain a U.S. security clearance may be required. Candidates may be asked to provide additional information relevant to clearance eligibility in accordance with applicable laws and regulations.
Work Environment
This role is based onsite in Tucson, AZ and may involve working in both an office and light production environment. Responsibilities may include occasional standing, lifting, and handling of equipment or materials.
The Fine Print
No 3rd party candidates will be accepted
It is Palladyne AI's policy to provide equal employment opportunity (EEO) to all persons regardless of race, color, religion, sex, national origin, age, sexual orientation, gender identity, genetic information, physical or mental disability, protected veteran status, or any other characteristic protected by federal, state/provincial, local law.

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