ASIC Chip Lead and Design Engineer You'll play a key role in designing and delivering complex ... direct industry experience with ASIC and/or SoC design. * Proficiency in Synopsys Design Compiler ...
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ASIC Chip Lead and Design Engineer You'll play a key role in designing and delivering complex ... direct industry experience with ASIC and/or SoC design. * Proficiency in Synopsys Design Compiler ...
Use Synopsys Design Compiler to create and synthesize RTL designs. * Optimize RTL code for area ... direct industry experience in ASIC and/or SoC design. * Strong background in RTL-based digital IC ...
Use Synopsys Design Compiler to create and synthesize RTL designs. * Optimize RTL code for area ... direct industry experience in ASIC and/or SoC design. * Strong background in RTL-based digital IC ...
Asic Chip Lead-Full Time- Onsite
Brooklyn Park, MN · On-site
$145K - $205K/yr
Bachelors/master's in electrical engineering/computer science or equivalent. * 10+ years of direct industry experience with ASIC and/or SoC design. * Proficiency in Synopsys Design Compiler and other ...
New
Asic Chip Lead-Full Time- Onsite
Brooklyn Park, MN · On-site
$145K - $205K/yr
Bachelors/master's in electrical engineering/computer science or equivalent. * 10+ years of direct industry experience with ASIC and/or SoC design. * Proficiency in Synopsys Design Compiler and other ...
New
Director Compiler Engineer information
What does a director compiler engineer do?
A Director Compiler Engineer leads teams responsible for designing, developing, and optimizing compiler technologies that translate high-level programming languages into machine code. They oversee the overall strategy, architecture, and performance of compiler products, ensuring they meet the needs of software developers and hardware platforms. In addition to managing projects and technical direction, they often collaborate with other engineering teams, mentor staff, and keep up with advances in programming languages and processor architectures.
What are the key skills and qualifications needed to thrive as a director compiler engineer?
To thrive as a Director Compiler Engineer, you need deep expertise in compiler theory, programming languages, and computer architecture, often supported by an advanced degree in computer science or a related field. Proficiency with compiler toolchains (like LLVM or GCC), performance analysis tools, and version control systems is typically required, along with familiarity with modern programming languages such as C++ or Rust. Strong leadership, strategic thinking, and excellent communication skills are essential for guiding teams and collaborating with stakeholders. These skills ensure the development of robust, high-performance compiler solutions that align with organizational goals and technology strategies.
What are some common challenges faced by a director compiler engineer, and how can they be addressed?
A Director Compiler Engineer often encounters challenges such as leading teams through complex technical problems, balancing project timelines with innovation, and ensuring cross-functional collaboration between hardware and software teams. Addressing these requires strong leadership, clear communication, and strategic planning to allocate resources efficiently. Additionally, staying up-to-date with evolving programming languages and hardware architectures is essential to guide the team and maintain competitive compiler performance.
What is the difference between Director Compiler Engineer vs Compiler Engineer?
| Aspect | Director Compiler Engineer | Compiler Engineer |
|---|---|---|
| Responsibilities | Oversees compiler development teams, sets strategic goals, manages project timelines | Designs, develops, and tests compiler components and features |
| Required Credentials | Bachelor's or Master's in Computer Science, extensive experience in compiler development, leadership skills | Bachelor's or Master's in Computer Science, strong programming skills, experience with compiler tools |
| Work Environment | Leadership roles in tech companies, collaborative team settings | Development teams, coding environments, research labs |
| Industry Usage | Common in large tech firms, software companies, and organizations with complex compiler needs | Used across software development, embedded systems, and research projects |
The main difference is that a Director Compiler Engineer focuses on leadership, strategy, and team management, while a Compiler Engineer concentrates on technical development and coding tasks. Both roles require strong technical skills, but the director role involves overseeing projects and guiding teams.
What are the most commonly searched types of Compiler Engineer jobs in Minnesota?
The most popular types of Compiler Engineer jobs in Minnesota are:
What are popular job titles related to Director Compiler Engineer jobs in Minnesota?
For Director Compiler Engineer jobs in Minnesota, the most frequently searched job titles are:
What job categories do people searching Director Compiler Engineer jobs in Minnesota look for?
The top searched job categories for Director Compiler Engineer jobs in Minnesota are:
What cities in Minnesota are hiring for Director Compiler Engineer jobs?
Cities in Minnesota with the most Director Compiler Engineer job openings:
ASIC Chip Lead and Design Engineer
Minneapolis, MN
Chelsea Search Group
Full-time
Posted 4 days ago
Job description
ASIC Chip Lead and Design Engineer
Job Description:
You’ll play a key role in designing and delivering complex, custom ASICs from concept through silicon. This is a highly hands-on opportunity for an engineer who enjoys solving challenging digital design problems and working across the full ASIC/SoC development flow. You’ll collaborate closely with architecture, verification, physical design, applications, and business teams to turn demanding technical requirements into high-performance silicon while optimizing for power, performance, and area (PPA). The ideal candidate is a high-aptitude engineer who is currently designing complex digital blocks and has strong, practical experience across the complete ASIC/SoC design lifecycle. Engineers with additional experience in radiation-hardened design, analog/mixed-signal circuits, EDA methodologies, or standard-cell library development will have an opportunity to apply and expand that expertise. Beyond design, you’ll help evaluate customer requirements, develop technical approaches and effort estimates for new opportunities, and influence improvements to internal design methodologies and processes.
Essential Duties and Qualifications:
• Chip Architecture and Development:
- Lead the architectural design of ASICs based on high-level requirements and block diagrams.
- Collaborate with system architects to define chip functionality, interfaces, and performance targets.
- Develop detailed specifications for the chip’s components.
• RTL Design and Synthesis:
- Use Synopsys Design Compiler to create RTL (Register Transfer Level) designs.
- Optimize RTL code for area, power, and performance.
- Implement and verify complex digital blocks.
• Constraint Development:
- Develop timing constraints for the entire chip.
- Work closely with physical design teams to ensure successful place-and-route.
• RISC Processor Conformance:
- Constrain and verify RISC processors within the chip.
- Optimize processor performance and power efficiency.
• Physical Design Collaboration:
- Collaborate with physical design teams on floorplanning, placement, and routing.
- Address any design closure issues.
• Verification Support:
- Work with verification engineers to ensure functional correctness.
- Assist in creating testbenches and verifying the chip’s functionality.
• Modern revision-control tools and best-practices in a collaborative, multi-site design community.
• Proficiency with UNIX/Linux incl. shell scripting, text utilities (e.g., sed, awk, grep), using Modules, high-level programming such as C/C++, PERL/Python/TCL scripting.
• Proficiency with Windows apps, incl. Word, Excel, PowerPoint, Visio, Project, PDF conversion.
Required Qualifications:
• BSEE/MSEE or equivalent
• 10+ years of direct industry experience with ASIC and/or SoC design.
• Proficiency in Synopsys Design Compiler and other EDA tools.
• Strong understanding of digital design principles.
• Familiarity with RISC architectures (e.g., ARM, MIPS).
• Excellent problem-solving skills and attention to detail.
• A strong background in RTL based digital IC design using Verilog/SystemVerilog.
• Proven track record of first-pass successes.
• A self-starter with the ability to assume leadership roles.
• Ability to work well in a diverse team environment.
• Willingness to mentor junior engineers.
• Experience with industry standard development tools and methodologies.
Job Description:
You’ll play a key role in designing and delivering complex, custom ASICs from concept through silicon. This is a highly hands-on opportunity for an engineer who enjoys solving challenging digital design problems and working across the full ASIC/SoC development flow. You’ll collaborate closely with architecture, verification, physical design, applications, and business teams to turn demanding technical requirements into high-performance silicon while optimizing for power, performance, and area (PPA). The ideal candidate is a high-aptitude engineer who is currently designing complex digital blocks and has strong, practical experience across the complete ASIC/SoC design lifecycle. Engineers with additional experience in radiation-hardened design, analog/mixed-signal circuits, EDA methodologies, or standard-cell library development will have an opportunity to apply and expand that expertise. Beyond design, you’ll help evaluate customer requirements, develop technical approaches and effort estimates for new opportunities, and influence improvements to internal design methodologies and processes.
Essential Duties and Qualifications:
• Chip Architecture and Development:
- Lead the architectural design of ASICs based on high-level requirements and block diagrams.
- Collaborate with system architects to define chip functionality, interfaces, and performance targets.
- Develop detailed specifications for the chip’s components.
• RTL Design and Synthesis:
- Use Synopsys Design Compiler to create RTL (Register Transfer Level) designs.
- Optimize RTL code for area, power, and performance.
- Implement and verify complex digital blocks.
• Constraint Development:
- Develop timing constraints for the entire chip.
- Work closely with physical design teams to ensure successful place-and-route.
• RISC Processor Conformance:
- Constrain and verify RISC processors within the chip.
- Optimize processor performance and power efficiency.
• Physical Design Collaboration:
- Collaborate with physical design teams on floorplanning, placement, and routing.
- Address any design closure issues.
• Verification Support:
- Work with verification engineers to ensure functional correctness.
- Assist in creating testbenches and verifying the chip’s functionality.
• Modern revision-control tools and best-practices in a collaborative, multi-site design community.
• Proficiency with UNIX/Linux incl. shell scripting, text utilities (e.g., sed, awk, grep), using Modules, high-level programming such as C/C++, PERL/Python/TCL scripting.
• Proficiency with Windows apps, incl. Word, Excel, PowerPoint, Visio, Project, PDF conversion.
Required Qualifications:
• BSEE/MSEE or equivalent
• 10+ years of direct industry experience with ASIC and/or SoC design.
• Proficiency in Synopsys Design Compiler and other EDA tools.
• Strong understanding of digital design principles.
• Familiarity with RISC architectures (e.g., ARM, MIPS).
• Excellent problem-solving skills and attention to detail.
• A strong background in RTL based digital IC design using Verilog/SystemVerilog.
• Proven track record of first-pass successes.
• A self-starter with the ability to assume leadership roles.
• Ability to work well in a diverse team environment.
• Willingness to mentor junior engineers.
• Experience with industry standard development tools and methodologies.