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Cpu Verification Engineer Jobs in California (NOW HIRING)

NVIDIA is seeking an exceptional Senior SoC ASIC Verification Engineer to confirm the functionality ... Solid understanding of basic concepts of CPU or SoC architecture. * Experience with verification of ...

$154K - $188K/yr

At Tenstorrent, we build open, state of the art compute for real workloads and real developers. You will own CPU core-level testbench development and verification, shaping how our out-of-order RISC-V ...

Staff Verification Engineer

Santa Clara, CA · On-site

$159K/yr

The Verification Engineer will ensure the fidelity of new highly configurable cores and other ... Direct experience with microarchitecture, instruction set design, or CPU pipeline optimization is ...

The Role and Impact As a CPU Pre-Silicon Verification Engineer , you will help ensure the quality, functionality, and readiness of Intel's next-generation CPU's the high-performance engines that ...

CPU DFT Verification Engineer

Santa Clara, CA · On-site

$159K/yr

Description As a CPU DFT Verification Engineer, you will have the following responsibilities: • Work closely with architecture, RTL designers, and DFT designers on verifying the functionality ...

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How much do cpu verification engineer jobs pay per year?

As of Aug 8, 2026, the average yearly pay for cpu verification engineer in California is $140,752.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,200.00 and $134,200.00 per year, depending on experience, location, and employer.

What is a CPU verification engineer?

A CPU Verification Engineer is responsible for ensuring that a CPU design functions correctly before manufacturing. They develop and execute test plans using simulation, formal verification, and other methodologies to validate processor behavior against specifications. This role requires knowledge of hardware description languages (like Verilog or VHDL), verification languages (such as SystemVerilog UVM), and debugging tools. CPU Verification Engineers collaborate with architects and designers to identify and resolve design issues. Their work is critical in catching bugs early, improving performance, and ensuring the reliability of modern processors.

What are the key skills and qualifications needed to thrive in the CPU verification engineer position, and why are they important?

A CPU Verification Engineer requires a solid understanding of computer architecture, digital logic design, and verification methodologies, typically backed by a degree in electrical or computer engineering. Familiarity with hardware description languages (such as Verilog or VHDL), industry-standard verification tools (like UVM, SystemVerilog), and scripting languages is highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help candidates excel in this role. These qualifications are essential to ensure rigorous testing of complex CPU designs, minimize costly errors, and drive project success.

What are the typical responsibilities of a CPU verification engineer during a project lifecycle?

As a CPU Verification Engineer, you'll work closely with design teams to develop and execute verification plans, write and maintain testbenches, and run simulations to uncover design issues. Your responsibilities will include identifying edge cases, debugging failures, ensuring coverage goals are met, and collaborating in code reviews. Projects often involve cross-functional teamwork with architects, design engineers, and software teams, offering exposure to various aspects of CPU development. This role is both technically demanding and highly collaborative, providing valuable opportunities to contribute to the creation of next-generation processors.

What job categories do people searching Cpu Verification Engineer jobs in California look for? The top searched job categories for Cpu Verification Engineer jobs in California are:
What cities in California are hiring for Cpu Verification Engineer jobs? Cities in California with the most Cpu Verification Engineer job openings:
Infographic showing various Cpu Verification Engineer job openings in California as of August 2026, with employment types broken down into 92% Full Time, 2% Part Time, and 6% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $140,752 per year, or $67.7 per hour.

Principal Design Verification Engineer - CPU Core Frontend

SiFive

Santa Clara, CA • On-site

Full-time

Medical, Retirement, PTO

Posted 20 days ago


Job description

About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive's unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.

Are you ready?

To learn more about SiFive's phenomenal success and to see why we have won theGSA's prestigious Most Respected Private Company Award(for the fourth time!), check out ourwebsiteandGlassdoorpages.

Job Description:

About the Role

SiFive is looking for a Principal Design Verification Engineer to lead verification strategy and execution for the CPU Core Frontend in a high-performance out-of-order core. This is a senior tech-lead role for an engineer who can define architecture-aware verification strategy, identify microarchitectural risk early, solve the hardest frontend verification problems, and raise verification quality across the broader CPU DV organization.

The primary technical scope of this role is frontend verification, with emphasis on branch prediction, instruction fetch, frontend redirects and recovery, prediction training/update behavior, fetch correctness, and interface interactions across the frontend pipeline. The role requires close partnership with architecture, RTL, performance, and verification teams to ensure design intent is captured correctly and signoff quality is achieved with strong technical judgment and scalable methodology.


Responsibilities
  • Lead verification planning and execution for CPU frontend functionality in a high-performance out-of-order core, with ownership spanning branch prediction and instruction fetch behavior.
  • Define verification strategy, test plans, checkers, scoreboards, assertions, stimulus strategies, and coverage models for frontend microarchitecture and its corner cases.
  • Drive verification of branch prediction structures and flows, including direction prediction, indirect target prediction, return prediction, predictor update/training behavior, redirect generation, recovery, and interaction with global history or related predictor state.
  • Drive verification of instruction fetch behavior, including fetch packet correctness, PC sequencing, fetch ordering, ITLB/translation interactions, exception reporting, cache-related fetch behavior, and redirect handling after misprediction or flush conditions.
  • Partner with architects and designers from early feature-definition stages to review specifications, identify ambiguity, and improve frontend debugability and verification completeness.
  • Drive block-level and core-level verification closure for frontend features, including coverage analysis, gap identification, bug triage, and signoff readiness.
  • Apply the right verification method for the problem, including simulation, formal techniques, and emulation where appropriate for high-risk or hard-to-observe frontend behaviors.
  • Mentor engineers across the organization and shape reusable verification approaches, infrastructure, and methodology for future CPU core generations.

Minimum Qualifications
  • BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • 12+ years of relevant experience in CPU/core or SoC functional verification, with substantial experience in high-performance CPU verification appropriate for a Principal / T6 role.
  • Direct experience with out-of-order CPU core verification and strong understanding of CPU microarchitecture.
  • Deep expertise in CPU frontend verification, especially branch prediction and instruction fetch verification.
  • Strong knowledge of verification flow methodology, including test planning, stimulus generation, failure analysis, coverage analysis, and coverage closure.
  • Strong debug skills and the ability to translate architectural intent into an effective verification strategy and execution plan.
  • Strong software and scripting fundamentals for building scalable DV infrastructure, automation, and analysis workflows.

Preferred Qualifications
  • Experience verifying advanced frontend architectures or decoupled fetch/prediction pipelines in high-performance CPU cores.
  • Experience with branch prediction microarchitecture such as BTB-style structures, target prediction, return prediction, global-history-based prediction, predictor training, and misprediction recovery.
  • Experience using formal verification to target bounded, control-heavy, or interface-sensitive frontend problems.
  • Experience using emulation or other acceleration techniques to improve turnaround on large CPU verification workloads.
  • Experience collaborating across architecture, performance, compiler, system verification, and software teams to close verification gaps from multiple perspectives.
  • Demonstrated technical leadership through mentoring, methodology influence, and cross-team execution on complex CPU verification efforts.

What Success Looks Like
  • Frontend verification plans capture real architectural and microarchitectural risks early and completely.
  • Difficult branch prediction, fetch, redirect, and recovery bugs are found early, debugged efficiently, and closed with durable solutions.
  • Verification quality improves across the broader CPU DV organization through stronger methodology, reusable infrastructure, and clear technical leadership.
  • Architecture, design, and DV teams rely on this engineer to solve the most complex frontend verification challenges in high-performance CPU development.

Working on solving verification challenges of memory management units that are being reused across several different generations of the Cores, as well as IO memory management unit. This includes hypervisor, virtualization, and guest virtualization.

BS/MS/Ph.D in EE, CE or CS

12+ years relevant experience with Core/CPU functional verification

8+ years direct experience on memory management verification

Deep understand of computer architecture

Seasoned developer using object oriented programing principles

In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in

United States of America

Any offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.

SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.