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Assistant Risc V Jobs (NOW HIRING)

Advanced Micro Devices, Inc

Firmware Engineer

Austin, TX · On-site

$125.37K/yr

The engineer will assist in the component firmware internal release process, resolving complex ... Experience with x86, ARM and/or RISC-V architecture. * Experience embedded firmware and/or device ...

Leidos

FPGA Firmware Design Engineer

Arlington, VA · On-site

Develop project test plans and test procedures, provide test planning support, and assist in the ... or RISC-V embedded processor based SoC design experience Proven experience in the military ...

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How much do assistant risc v jobs pay per year?

As of Jun 3, 2026, the average yearly pay for assistant risc v in the United States is $48,396.00, according to ZipRecruiter salary data. Most workers in this role earn between $42,000.00 and $48,500.00 per year, depending on experience, location, and employer.

What is the difference between Assistant Risc V vs Embedded Systems Technician?

AspectAssistant Risc VEmbedded Systems Technician
Required CredentialsAssociate degree or technical certification in electronics or computer engineeringAssociate degree or higher in electronics, computer engineering, or related field
Work EnvironmentDesign labs, manufacturing facilities, testing environmentsIndustrial, manufacturing, or technology companies working on embedded systems
Industry UsageSemiconductor, hardware development, embedded system designEmbedded device development, hardware troubleshooting, firmware testing

The Assistant Risc V and Embedded Systems Technician roles share similar credentials and work environments, often overlapping in hardware and embedded system industries. While the Assistant Risc V focuses specifically on RISC-V architecture support, the Embedded Systems Technician has a broader scope across various embedded platforms. Both roles are essential in hardware development and testing, making them closely related in the tech industry.

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What cities are hiring for Assistant Risc V jobs? Cities with the most Assistant Risc V job openings:
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Assistant Risc V jobs near you
Infographic showing various Assistant Risc V job openings in the United States as of May 2026, with employment types broken down into 77% Full Time, 21% Part Time, and 2% Contract. Highlights an 95% Physical, 2% Hybrid, and 3% Remote job distribution, with an average salary of $48,396 per year, or $23.3 per hour.

Design Verification Intern -RISCV CPU

Tenstorrent University Jobs

Austin, TX • On-site

$50 - $70/hr

Internship

Posted 9 days ago

Job description

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
In this role, you will learn Functional verification of high-performance CPUs going into industry leading AI/ML architecture. You will be mentored by and work alongside a group of highly experienced engineers across various domains of the AI chip.
This role is on-site, 40 hours, based out of Santa Clara, CA or Austin, TX.
This is for our Fall 2026 Semester
Who You Are
  • Passionate about computer architecture and curious about how cutting-edge CPUs actually work.
  • Enrolled in a BS, MS, or PhD program in EE, CE, CS, or a related field, with a strong academic record.
  • Experienced with C++, SystemVerilog, or scripting languages through coursework or personal projects.
  • Comfortable thinking at both the software and hardware level-including assembly and RTL.

What We Need
  • Contribute to the functional verification of high-performance CPUs designed for general purpose and AI/ML applications.
  • Help develop DV test plans and testbenches for both ISA and microarchitecture-level features.
  • Debug RTL code and assist in making real design changes that impact chip development.
  • Build tools and write stimulus code that can scale across pre-silicon to post-silicon environments.

What You Will Learn
  • Get hands-on experience verifying state-of-the-art AI/ML hardware with guidance from experienced engineers.
  • Explore how performance, RTL, and DV tools come together in a full-chip environment.
  • Deepen your understanding of CPU design, ISA-level verification, and system-level debugging.
  • Work in a real-world engineering team and gain exposure to industry-standard workflows and toolchains.

Compensation for all interns at Tenstorrent ranges from $50/hr - $70/hr including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

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