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Assistant Digital Verification Engineer Jobs (NOW HIRING)

Apple

Wireless Radio Verification Engineer

San Diego, CA

$122K - $214K/yr

As a Wireless Radio Verification Engineer, you'll ensure first-time-right silicon success through ... This role emphasizes digital verification while bridging to RF/analog domains-you'll work closely ...

Apple

Wireless Radio Verification Engineer

San Diego, CA

$122K - $214K/yr

As a Wireless Radio Verification Engineer, you'll ensure first-time-right silicon success through ... This role emphasizes digital verification while bridging to RF/analog domains-you'll work closely ...

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Assistant Digital Verification Engineer information

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$33K

$88.8K

$134.5K

How much do assistant digital verification engineer jobs pay per year?

As of Jul 20, 2026, the average yearly pay for assistant digital verification engineer in the United States is $88,754.00, according to ZipRecruiter salary data. Most workers in this role earn between $70,500.00 and $104,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an Assistant Digital Verification Engineer, and why are they important?

To thrive as an Assistant Digital Verification Engineer, you need a solid understanding of digital design fundamentals, computer architecture, and a relevant degree in electrical or computer engineering. Familiarity with verification languages like SystemVerilog or UVM, along with experience using simulation and debugging tools such as ModelSim or VCS, is typically required. Strong analytical thinking, problem-solving ability, and effective communication skills help you collaborate with design teams and troubleshoot complex issues. These skills and qualities are crucial for ensuring reliable hardware designs and seamless project execution in a fast-paced engineering environment.

What are some common challenges faced by an Assistant Digital Verification Engineer during the verification process?

One common challenge for Assistant Digital Verification Engineers is ensuring comprehensive test coverage while meeting tight project deadlines. Balancing the need to identify edge cases and potential design bugs with limited simulation time can be demanding. Collaborating effectively with design and verification teams to clarify specifications and debug complex issues is also essential. Adapting quickly to evolving verification methodologies and tools is key to success in this role.

What is the difference between Assistant Digital Verification Engineer vs Digital Verification Engineer?

AspectAssistant Digital Verification EngineerDigital Verification Engineer
Required CredentialsBachelor's degree in Electrical Engineering or related field; some certificationsBachelor's or Master's degree; professional certifications often preferred
Work EnvironmentEntry-level, team support, supervised tasksMore independent, complex verification tasks
Employer & Industry UsageSemiconductor, electronics companies, R&D teamsSame industries, higher responsibility roles

The Assistant Digital Verification Engineer typically supports verification activities under supervision, focusing on learning and assisting with testing processes. In contrast, the Digital Verification Engineer handles more complex verification tasks independently, ensuring the functionality of digital designs. Both roles are essential in the verification process, but they differ in experience level and responsibility.

What does an Assistant Digital Verification Engineer do?

An Assistant Digital Verification Engineer supports the design and testing of digital circuits and systems to ensure they function correctly according to specifications. They assist in creating verification plans, writing and running simulations, debugging issues, and documenting results. Their work is essential in identifying design flaws early in the development process, which helps to improve the quality and reliability of electronic products. Typically, they work closely with design engineers and senior verification engineers as part of a larger hardware development team.
What cities are hiring for Assistant Digital Verification Engineer jobs? Cities with the most Assistant Digital Verification Engineer job openings:
What are the most commonly searched types of Digital Verification Engineer jobs? The most popular types of Digital Verification Engineer jobs are:
What states have the most Assistant Digital Verification Engineer jobs? States with the most job openings for Assistant Digital Verification Engineer jobs include:
Assistant Digital Verification Engineer jobs near you
Senior Digital & Mixed-Signal Verification Engineer

Senior Digital & Mixed-Signal Verification Engineer

Mythic

Palo Alto, CA • Hybrid

$125K - $250K/yr

Full-time

Re-posted 14 days ago

Job description

About Us:
Mythic’s platform delivers the power of desktop GPU in a single low-power chip, supporting inference for large deep neural networks. Mythic's technology is based upon an entirely new hybrid digital/analog flash calculation using non-volatile memory arrays which has been under development since 2012.  This step change in performance enables a range of new applications in many markets, including safety and security, autonomous vehicles, VR/AR, robotics, and media.  Mythic’s AI hardware combines knowledge across many domains, including AI, compilers, computer architecture, analog circuits, and non-volatile memories. Mythic will enable the future of AI by building analog-compute hardware platforms that are 100-1000x more efficient than conventional all-digital systems
 
About the role:
We are looking for an experienced digital and mixed-signal verification engineer who excels working in large complex systems with and enjoys utilizing a broad set of skills. This person will do everything from RNM creation to verifying top-level algorithms, all while ensuring interfaces, specifications, and features are clear between multiple teams. This role is largely responsible for ensuring Mythic's analog compute core can be accurately and thoroughly verified by the digital and mixed-signal verification flow, and is expected to contribute to methodology.
Required experience includes:
  • Significant experience with verification of RNMs in mixed-signal / SoC verification
  • Extensive digital verification background 
  • UVM expertise
  • Verification (and ownership a plus) of RTL for mixed-signal controllers and FSMs (for Data Converters, PLLs, Power Converters, etc.)
  • Experience tracking and communicating mixed-signal interface requirements/specifications
  • Ability to work cross-functional teams with humility
  • Excellent communication skills, especially resolving ambiguity
Bonus attributes:
  • Project leadership experience
  • Experience in Virtuoso 
  • Cadence tool setup and infrastructure knowledge (reasonable ability to debug)
  • Strength in linux (reasonable ability to debug)
Salary will be dependent upon candidate experience and location