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Asic Verification Engineer Jobs in Indiana (NOW HIRING)

Raytheon Technologies

FPGA Engineer II

Fort Wayne, IN · On-site

$128K - $164K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

Raytheon Technologies

Principal FPGA Engineer

Wayne, IN · On-site

$123K - $150K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

Raytheon Technologies

FPGA Engineer II

Wayne, IN · On-site

$115K - $148K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

Raytheon

FPGA Engineer II

Fort Wayne, IN

$128K - $164K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

Raytheon

Principal FPGA Engineer

Fort Wayne, IN

$137K - $167K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

Kratos Defense

ASIC Design Leader

Crane, IN · On-site

Due to the nature of our research and the necessity to obtain security clearance, the Engineering ... implementation and verification using Verilog/VHDL * 5+ years of experience with FPGAs with ...

Raytheon Technologies

Senior FPGA Design Engineer

Wayne, IN · On-site

$109K - $150K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

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All JobsAsic Verification Engineer JobsAsic Verification Engineer Jobs in Indiana

Asic Verification Engineer information

See Indiana salary details

$83.7K

$148.5K

$197K

How much do asic verification engineer jobs pay per year?

As of Aug 9, 2026, the average yearly pay for asic verification engineer in Indiana is $148,517.00, according to ZipRecruiter salary data. Most workers in this role earn between $129,400.00 and $167,000.00 per year, depending on experience, location, and employer.

What is the salary of an ASIC verification engineer?

The salary of an ASIC verification engineer typically ranges from $80,000 to $150,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while experienced engineers with specialized skills in hardware description languages and verification tools can earn higher salaries.

What are some common challenges faced by ASIC Verification Engineers during the verification process?

ASIC Verification Engineers often encounter challenges such as dealing with complex designs, debugging intricate issues, and ensuring thorough coverage of all design specifications. Coordinating with design and RTL teams to clarify requirements and resolve discrepancies is a frequent part of the job. Additionally, managing tight project timelines while maintaining high verification quality requires effective time management and strong communication skills. Continuous learning is also important, as verification methodologies and tools evolve rapidly in this field.

What are the key skills and qualifications needed to thrive as an ASIC Verification Engineer, and why are they important?

To thrive as an ASIC Verification Engineer, you need a solid background in digital design, computer architecture, and verification methodologies, typically supported by a degree in electrical engineering or a related field. Familiarity with tools and languages like SystemVerilog, UVM, simulation environments, and waveform viewers is essential, and certifications in verification or design may be beneficial. Strong analytical thinking, attention to detail, and effective communication are crucial soft skills for debugging complex designs and collaborating with design teams. These skills and qualities are vital to ensure that ASIC designs are thoroughly tested, compliant with specifications, and delivered with high quality and reliability.

What does an ASIC verification engineer do?

An ASIC verification engineer designs and executes tests to ensure that integrated circuit designs function correctly according to specifications. They develop test plans, write simulation testbenches using hardware description languages like SystemVerilog, and analyze simulation results to identify and fix design issues. This role requires knowledge of digital design, verification tools, and often involves working closely with design engineers throughout the development process.

What is an ASIC Verification Engineer?

An ASIC Verification Engineer is a professional who specializes in testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they function correctly according to specifications. They develop testbenches, write test cases, and use simulation tools to detect and debug design errors before the chip is manufactured. Their work is critical in preventing costly mistakes and ensuring the final product meets performance and reliability standards. ASIC Verification Engineers often collaborate closely with design engineers to understand requirements and resolve issues.

What is the difference between Asic Verification Engineer vs Digital Design Engineer?

AspectAsic Verification EngineerDigital Design Engineer
Primary FocusVerifying ASIC designs for correctness and functionalityDesigning digital circuits and architectures
Skills & CertificationsHardware description languages (HDL), verification tools, scriptingHDL, digital logic, circuit design
Work EnvironmentVerification labs, simulation environmentsDesign teams, CAD tools, prototyping labs
Industry UsageSemiconductor, electronics manufacturingSemiconductor, consumer electronics, computing

While both roles require expertise in HDL and semiconductor industry experience, Asic Verification Engineers focus on testing and validating ASIC designs, ensuring they meet specifications. Digital Design Engineers primarily create and develop digital circuits. Both roles are essential in the chip development process but differ in their core responsibilities and daily tasks.

What is an ASIC Verification Engineer?

An ASIC verification engineer works with system designers and architects to test performance and validate hardware components and systems. You plan and develop a verification environment while coordinating with developers and architects throughout the design process. Your duties involve working closely with these other teams during the design process. Your responsibilities may include using computer hardware languages such as Verilog. In this career, you work on hardware design and use algorithms, data structure analysis, and other advanced design techniques.

More about Asic Verification Engineer jobs
What are the most commonly searched types of Asic Verification Engineer jobs in Indiana? The most popular types of Asic Verification Engineer jobs in Indiana are:
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What job categories do people searching Asic Verification Engineer jobs in Indiana look for? The top searched job categories for Asic Verification Engineer jobs in Indiana are:
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Asic Verification Engineer jobs near you
Infographic showing various Asic Verification Engineer job openings in Indiana as of August 2026, with employment types broken down into 100% Full Time. Highlights an 75% In-person, and 25% Hybrid job distribution, with an average salary of $148,517 per year, or $71.4 per hour.

Principal FPGA/ASIC Verification Engineer (Onsite)

Prattwhitney

Fort Wayne, IN • On-site

$90 - $120/hr

Other

Posted 4 days ago

Job description

Position Overview

Principal Electrical or Computer Engineer – Onsite, FortWayne, IN (US‑Citizen required). Requires an active and transferable U.S. government‑issued security clearance (DoD Secret). This role leads the design, implementation, and verification of advanced testbenches for a portfolio of high‑performance digital ASICs and FPGAs, supporting critical MissionSystems programs within the Microelectronics Technology team.

Responsibilities
  • Verification environment architecture and design using SystemVerilog with OVM/UVM
  • Creation of written test plan, test cases, code coverage tracking, and functional coverage tracking
  • Testbench development for the verification of RTL blocks using VHDL or SystemVerilog
  • Recommend new tools and practices for continuous improvement in the group’s ASIC/FPGA verification flow
  • Contribute to engineering estimates for new program pursuits
  • Provide technical leadership for project verification teams, breaking down work, planning activities, and reporting status
Qualifications
  • Typically requires a STEM degree and minimum 8years of relevant experience, or an advanced degree and minimum 5years of experience
  • Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment (at least 4years)
  • Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog
  • Experience with chip‑level verification methodologies (constrained‑random testing, functional coverage analysis, assertion‑based verification)
  • Experience using revision control systems such as Git or Subversion
  • Demonstrated ability to work independently and mentor junior engineers
  • Preferred: Experience with ASIC/FPGA lab validation and debug, familiarity with DFT, manufacturability, and production test concepts, proficiency with Unix/Linux, scripting or software development
Security Clearance

U.S. citizenship required. Active and transferable DoD Secret security clearance required prior to start date.

EEO Statement

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status.

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