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Asic Design Verification Engineer Internship Jobs in Indiana

Intellectt INC

Sr Design Verification Engineer

Lebanon, IN · On-site

$130K - $159K/yr

Job Title: Sr. Design Verification Engineer Location: Remote Onsite Requirement: Approximately 1 week per month onsite at the project location in Lebanon, IN Duration: Longterm Job Summary The Sr. ...

Kratos Defense

ASIC Design Leader

Crane, IN

Due to the nature of our research and the necessity to obtain security clearance, the Engineering ... implementation and verification using Verilog/VHDL * 5+ years of experience with FPGAs with ...

RTX

FPGA Engineer II with Security Clearance

Fort Wayne, IN · On-site

$113K - $156K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

Raytheon Technologies

FPGA Engineer II

Fort Wayne, IN

$128K - $164K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

Raytheon

FPGA Engineer II

Fort Wayne, IN

$128K - $164K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

Raytheon Technologies

FPGA Engineer II

Wayne, IN · On-site

$115K - $148K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

Raytheon

Senior FPGA Design Engineer

Fort Wayne, IN

$121K - $167K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

Raytheon Technologies

Senior FPGA Design Engineer

Wayne, IN · On-site

$109K - $150K/yr

FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...

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Asic Design Verification Engineer Internship information

What does an ASIC Design Verification Engineer Intern do?

An ASIC Design Verification Engineer Intern assists with testing and validating the functionality of Application-Specific Integrated Circuits (ASICs) during the hardware development process. Their responsibilities typically include writing test benches, developing verification environments, running simulations, and identifying bugs or design flaws before fabrication. Interns often use hardware description languages like Verilog or VHDL and verification methodologies such as UVM. This role is essential to ensure that the final ASIC design meets the required specifications and functions correctly.

What are the key skills and qualifications needed to thrive as an ASIC Design Verification Engineer Intern, and why are they important?

To thrive as an ASIC Design Verification Engineer Intern, you typically need a solid background in digital logic design, hardware description languages (HDLs) like Verilog or VHDL, and coursework in computer engineering or electrical engineering. Familiarity with simulation tools (such as ModelSim or Synopsys VCS), scripting languages like Python or Perl, and version control systems is highly valued. Strong analytical thinking, problem-solving abilities, and effective teamwork skills set exceptional candidates apart. These competencies are crucial for ensuring the functionality, reliability, and timely delivery of complex integrated circuits.

What are some typical challenges faced during an ASIC Design Verification Engineer Internship, and how can interns effectively address them?

Interns in ASIC design verification often encounter challenges such as understanding complex hardware specifications, learning new verification tools and methodologies, and debugging intricate design issues. To overcome these, it's important to proactively seek guidance from senior engineers, utilize available documentation and training resources, and actively participate in team meetings. Building strong communication skills and staying organized with test plans and bug tracking can also make the workflow smoother and more manageable.

What is the difference between Asic Design Verification Engineer Internship vs Asic Design Engineer?

AspectAsic Design Verification Engineer InternshipAsic Design Engineer
CredentialsTypically pursuing or recent graduate in Electrical Engineering or Computer EngineeringBachelor's or Master's degree in Electrical Engineering or related field
Work EnvironmentInternship program, often in a corporate R&D or design teamFull-time professional role in ASIC design teams
ResponsibilitiesAssisting in verification testbenches, running simulations, learning verification toolsDesigning, implementing, and testing ASIC hardware components
DurationUsually 3-6 monthsFull-time ongoing role

The Asic Design Verification Engineer Internship is an entry-level, temporary position focused on assisting verification tasks, while the Asic Design Engineer role involves full responsibility for ASIC design and development. Internships provide hands-on experience, whereas full engineers lead projects and make design decisions.

What are popular job titles related to Asic Design Verification Engineer Internship jobs in Indiana? For Asic Design Verification Engineer Internship jobs in Indiana, the most frequently searched job titles are:
What job categories do people searching Asic Design Verification Engineer Internship jobs in Indiana look for? The top searched job categories for Asic Design Verification Engineer Internship jobs in Indiana are:
Asic Design Verification Engineer Internship jobs near you

Sr Design Verification Engineer

Intellectt INC

Lebanon, IN • On-site

$130K - $159K/yr

Contractor

Re-posted 24 days ago

Job description

Job Title: Sr. Design Verification Engineer
Location: Remote
Onsite Requirement: Approximately 1 week per month onsite at the project location in Lebanon, IN
Duration: Longterm

Job Summary

The  Sr. Design Verification Engineer will lead and coordinate detailed design activities for a large regulated manufacturing capital project, mainly covering utilities systems, tank farm, and central infrastructure. The role ensures design quality, compliance, schedule alignment, and smooth coordination between design teams, engineering stakeholders, commissioning, qualification, and project leadership.

Key Responsibilities

  • Lead detailed design for utilities, tank farm, and infrastructure systems
  • Ensure design deliverables and IFC drawings are accurate and on schedule
  • Manage URS, design verification, and design qualification activities
  • Coordinate design reviews, RFIs, and issue resolution
  • Ensure compliance with engineering standards and regulatory requirements
  • Work with commissioning, qualification, engineering, and construction teams
  • Report design progress and key project metrics to leadership

Skills Required

  • Experience leading design for large capital projects
  • Strong knowledge of utilities, plant infrastructure, and tank farm systems
  • Hands-on experience with URS, RFIs, IFC drawings, and design qualification
  • Understanding of regulated industries like pharma, biotech, or life sciences
  • Strong coordination, communication, and problem-solving skills
  • Ability to manage schedules, stakeholders, and cross-functional teams

For more information, please reach out at 732-719-4936 or share your updated resume with padma.priya@intellectt.com.