1

Design Verification Engineer Jobs in Indiana (NOW HIRING)

Design verification and validation test plans and protocols * Analyze testing data and recommend ... Create engineering procedures, work instructions, and standardized processes * Support design ...

Design Engineer

Indianapolis, IN · On-site

$100K - $110K/yr

Design verification and validation test plans and protocols * Analyze testing data and recommend ... Create engineering procedures, work instructions, and standardized processes * Support design ...

Applies advanced GD&T, tolerance analysis, and design verification methods * Approves engineering designs, drawings, and ECNs * Acts as subject matter expert across multiple product lines * Resolves ...

Lead Systems Engineer. Carmel, IN. Gather and review stakeholder requirements and ensure the ... and design verification activities, developing design standards, ensuring EMC compliance and ...

next page

Showing results 1-20

Design Verification Engineer information

See Indiana salary details

$100.4K

$141.9K

$158.9K

How much do design verification engineer jobs pay per year?

As of Aug 18, 2026, the average yearly pay for design verification engineer in Indiana is $141,925.00, according to ZipRecruiter salary data. Most workers in this role earn between $129,400.00 and $158,000.00 per year, depending on experience, location, and employer.

What is a design verification engineer?

A Design Verification Engineer ensures that hardware designs function correctly by developing and executing test plans, writing verification code (often in SystemVerilog with UVM), and debugging design issues. They work closely with design and validation teams to confirm specifications are met before manufacturing. Their role is critical in preventing costly design flaws and ensuring high-quality semiconductor products.

What skills and qualifications are needed to be a design verification engineer?

Design Verification Engineers require a solid background in digital design concepts, computer engineering, and electrical engineering, usually supported by a relevant bachelor’s or master’s degree. Expertise with hardware description languages like Verilog or VHDL, simulation tools, and familiarity with Unix/Linux environments are typical technical requirements, with certifications in FPGA/ASIC design considered advantageous. Strong analytical thinking, problem-solving skills, teamwork, and effective communication help these engineers collaborate closely with design, validation, and development teams. These competencies are vital to ensuring design correctness, catching flaws early, and driving efficient, reliable hardware development.

What are the most common challenges faced by design verification engineers in their daily work?

Design Verification Engineers often face the challenge of thoroughly validating complex digital designs within tight project deadlines. Debugging intricate issues, dealing with evolving specifications, and ensuring complete coverage during simulation can require a great deal of attention to detail and persistence. Collaboration with designers, validation teams, and often cross-functional groups is critical to resolving ambiguities and preventing errors from reaching production. Adapting to new verification methodologies or tools is also common as technologies and standards advance. These challenges offer valuable learning opportunities and play a crucial role in producing robust, high-quality hardware products.

What are popular job titles related to Design Verification Engineer jobs in Indiana?

For Design Verification Engineer jobs in Indiana, the most frequently searched job titles are:

What job categories do people searching Design Verification Engineer jobs in Indiana look for?

The top searched job categories for Design Verification Engineer jobs in Indiana are:

What are popular job titles related to Design Verification Engineer jobs in IN?

For Design Verification Engineer jobs in IN, the most frequently searched job titles are:

Infographic showing various Design Verification Engineer job openings in Indiana as of August 2026, with employment types broken down into 86% Full Time, 10% Part Time, and 4% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $141,925 per year, or $68.2 per hour.

Principal FPGA/ASIC Verification Engineer (Onsite)

Prattwhitney

Fort Wayne, IN • On-site

$90 - $120/hr

Other

Posted 12 days ago


Job description

Position Overview

Principal Electrical or Computer Engineer – Onsite, FortWayne, IN (US‑Citizen required). Requires an active and transferable U.S. government‑issued security clearance (DoD Secret). This role leads the design, implementation, and verification of advanced testbenches for a portfolio of high‑performance digital ASICs and FPGAs, supporting critical MissionSystems programs within the Microelectronics Technology team.

Responsibilities
  • Verification environment architecture and design using SystemVerilog with OVM/UVM
  • Creation of written test plan, test cases, code coverage tracking, and functional coverage tracking
  • Testbench development for the verification of RTL blocks using VHDL or SystemVerilog
  • Recommend new tools and practices for continuous improvement in the group’s ASIC/FPGA verification flow
  • Contribute to engineering estimates for new program pursuits
  • Provide technical leadership for project verification teams, breaking down work, planning activities, and reporting status
Qualifications
  • Typically requires a STEM degree and minimum 8years of relevant experience, or an advanced degree and minimum 5years of experience
  • Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment (at least 4years)
  • Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog
  • Experience with chip‑level verification methodologies (constrained‑random testing, functional coverage analysis, assertion‑based verification)
  • Experience using revision control systems such as Git or Subversion
  • Demonstrated ability to work independently and mentor junior engineers
  • Preferred: Experience with ASIC/FPGA lab validation and debug, familiarity with DFT, manufacturability, and production test concepts, proficiency with Unix/Linux, scripting or software development
Security Clearance

U.S. citizenship required. Active and transferable DoD Secret security clearance required prior to start date.

EEO Statement

RTX is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability or veteran status.

#J-18808-Ljbffr