ASIC Physical Design Engineer (TSMC / FinFET)
Lafayette, IN · On-site
$130K - $134K/yr
ASIC Physical Design Engineer (TSMC / FinFET) Location ... Lafayette, Indiana ( "Relocation assistance provided") Type: Full time with Client Tapeout, Signoff ...
Lafayette, IN · On-site
$130K - $134K/yr
ASIC Physical Design Engineer (TSMC / FinFET) Location ... Lafayette, Indiana ( "Relocation assistance provided") Type: Full time with Client Tapeout, Signoff ...
Lafayette, IN · On-site
$130K - $134K/yr
ASIC Physical Design Engineer (TSMC / FinFET) Location ... Lafayette, Indiana ( "Relocation assistance provided") Type: Full time with Client Tapeout, Signoff ...
| Aspect | Tapeout Design Engineer | ASIC Design Engineer |
|---|---|---|
| Credentials | Bachelor's or Master's in Electrical Engineering or related field; knowledge of EDA tools | Bachelor's or Master's in Electrical Engineering or related field; strong digital design skills |
| Work Environment | Semiconductor companies, chip design firms, EDA tool providers | Semiconductor companies, integrated circuit design firms |
| Industry Usage | Focuses on final chip layout and manufacturing readiness | Designs the digital architecture and logic of chips |
While both roles require a background in electrical engineering and familiarity with EDA tools, a Tapeout Design Engineer specializes in preparing the final chip layout for manufacturing, ensuring design rules are met. An ASIC Design Engineer focuses on creating the digital logic and architecture of integrated circuits. The roles often collaborate but differ mainly in their stage of the design process and specific responsibilities.
$130K - $134K/yr
Full-time
Posted 18 hours ago
Sourced by ZipRecruiter