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Asic Layout Design Engineer Jobs (NOW HIRING)

Teledyne FLIR LLC

Sr. ASIC Layout Design Engineer

Goleta, CA · On-site

$113.60K - $151.40K/yr

We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to help develop the next generation of high-performance focal-plane array readout integrated circuits (ROICs). These ...

Teledyne

Sr. ASIC Layout Design Engineer

Goleta, CA · On-site

$113.60K - $151.40K/yr

We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to help develop the next generation of high-performance focal-plane array readout integrated circuits (ROICs). These ...

IC Enable

IC Layout Design Engineer

Richardson, TX · Hybrid

... custom ASIC / SOC and electronics development across the Semiconductor, Medical and Defense ... The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team ...

Nvidia

OR · Hybrid

You'll work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products. * Job duties will include floor planning, custom layout and verifying against design rules and ...

Eridu AI

Substrate Layout Design Engineer

Saratoga, CA · On-site

$240K - $275K/yr

Collaborate with system architects, packaging engineers, ASIC, SI/PI, and mechanical teams to align ... Experience in PCB design layout and schematic. * Strong understanding of co-design methodology ...

Alphacore Inc

Analog Layout Design Engineer

Arizona, LA · On-site +1

$193.50K/yr

Analog Layout Design Engineer (Contract Position) Location: Remote | Headquarters: Tempe, Arizona, USA Company: Alphacore Inc. About Us Alphacore Inc. is a fast-growing innovator in high-performance ...

Alphacore Inc

Analog Layout Design Engineer

Tempe, AZ · On-site

$193.50K/yr

Analog Layout Design Engineer (Contract Position) Location: Remote | Headquarters: Tempe, Arizona, USA Company: Alphacore Inc. About Us Alphacore Inc. is a fast-growing innovator in high-performance ...

Amaze Systems Inc

Analog Layout Design engineer

Oakland, CA · On-site

$232K/yr

Analog Layout Design engineer - bay area , CA - Onsite Contract position * Minimum 15+ years of related experience with an associate degree. * Own and execute the layout design of analog modules ...

Apple

Digital Layout Design Engineer

Austin, TX · On-site

... design team to plan, schedule work and negotiate layout tradeoffs as needed. - Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts. - Exceed engineering ...

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Asic Layout Design Engineer information

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$45K

$120.8K

$185.5K

How much do asic layout design engineer jobs pay per year?

As of Jun 1, 2026, the average yearly pay for asic layout design engineer in the United States is $120,849.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,000.00 and $144,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an ASIC Layout Design Engineer, and why are they important?

To thrive as an ASIC Layout Design Engineer, you need expertise in semiconductor physics, VLSI design, and layout methodologies, typically supported by a degree in electrical engineering or a related field. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, and knowledge of process design kits (PDKs) are routinely required. Attention to detail, strong problem-solving abilities, and effective collaboration skills help engineers excel in this role. These skills are crucial for ensuring accurate, efficient, and manufacturable chip designs that meet performance and reliability standards.

What are some common challenges faced by ASIC Layout Design Engineers in managing complex projects?

ASIC Layout Design Engineers often face challenges such as meeting tight design schedules, ensuring design rule compliance, and minimizing layout-induced circuit issues like parasitics and crosstalk. Balancing these technical demands with iterative feedback from verification and design teams requires effective communication and strong problem-solving skills. Additionally, staying updated with evolving EDA tools and process technologies is essential for delivering high-quality layouts within project constraints.

What are ASIC Layout Design Engineers?

ASIC Layout Design Engineers are specialized professionals who create the physical design of Application-Specific Integrated Circuits (ASICs). They translate circuit schematics into geometric representations that can be fabricated onto silicon chips, ensuring performance, power, and area specifications are met. Their work involves using electronic design automation (EDA) tools to place and route circuit elements while adhering to manufacturing constraints and design rules. They collaborate closely with circuit designers and verification engineers throughout the chip design process.

What is the difference between Asic Layout Design Engineer vs Digital IC Design Engineer?

AspectAsic Layout Design EngineerDigital IC Design Engineer
Primary FocusPhysical layout and placement of ASIC componentsLogical design and architecture of digital circuits
Skills RequiredEDA tools, layout optimization, fabrication process knowledgeHDL coding, simulation, digital logic design
Work EnvironmentASIC design teams, fabrication facilitiesDesign houses, semiconductor companies
CertificationsTypically none specific, but familiarity with industry standardsHDL certifications, digital design courses

While both roles are integral to ASIC development, the Asic Layout Design Engineer focuses on the physical implementation of circuits, ensuring manufacturability and performance. In contrast, the Digital IC Design Engineer concentrates on the logical design and verification of digital circuits. Both roles require knowledge of digital design principles, but their daily tasks and skill sets differ significantly.

More about Asic Layout Design Engineer jobs
What states have the most Asic Layout Design Engineer jobs? States with the most job openings for Asic Layout Design Engineer jobs include:
What job categories do people searching Asic Layout Design Engineer jobs look for? The top searched job categories for Asic Layout Design Engineer jobs are:
Asic Layout Design Engineer jobs near you
Infographic showing various Asic Layout Design Engineer job openings in the United States as of May 2026, with employment types broken down into 86% Full Time, and 14% Contract. Highlights an 100% In-person job distribution, with an average salary of $120,849 per year, or $58.1 per hour.
Sr. ASIC Layout Design Engineer

Sr. ASIC Layout Design Engineer

Teledyne FLIR LLC

Goleta, CA • On-site

$113.60K - $151.40K/yr

Full-time

Posted 19 days ago

Job description

Be visionary
Teledyne Technologies Incorporated provides enabling technologies for industrial growth markets that require advanced technology and high reliability. These markets include aerospace and defense, factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration and production, medical imaging and pharmaceutical research.
We are looking for individuals who thrive on making an impact and want the excitement of being on a team that wins.
Job Description
Job Summary: We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to help develop the next generation of high-performance focal-plane array readout integrated circuits (ROICs). These chips form the heart of our infrared detectors, sensors, and cameras-used in applications ranging from firefighting and security to scientific research and government contracts.
As part of our close-knit team, you will play a key role in producing analog and mixed-signal circuit layouts by preparing multi-dimensional, detailed drawings of the semiconductor devices from schematics provided by design engineering. You will collaborate closely with analog and digital circuit designers, ensuring precision in signal integrity, parasitic coupling, and matched transistor pairs. From initial design discussions to final tape-out, your expertise will help shape industry-leading imaging technology.
Must be US Citizen or PERM Resident
Primary Duties & Responsibilities:
  • Develop high-quality analog/mixed-signal IC layouts and create GDS databases of completed designs using Cadence and Siemens software tools.
  • Collaborate with circuit designers to optimize floor-planning, placement, and routing.
  • Ensure layout integrity and compliance to foundry wafer fabrication with Design Rule Checks (DRC), Layout Versus Schematic (LVS), Parasitic Extraction (PEX), and the use of Process Design Kits (PDK).
  • Interface with ROIC designers, detector engineers, systems engineers, processors, test, and packaging teams to optimize performance, manufacturability and yield.
  • Present weekly updates to project schedule and percent task completions. Prepare reports for design reviews and internal and external customer presentations.
  • Perform proper handling of Export Controlled Information and exercise discipline in following GTC protocol and jurisdictional classification.
  • Release and maintain design documents per the ISO quality system requirements.

What You Bring:
  • Bachelor's degree in engineering or related field with 10+ years of industry experience
  • Expertise in analog/mixed-signal layout design for CMOS circuits, ideally in 180nm, 130nm, or 75nm process nodes
  • Proficiency in Cadence Virtuoso XL for connectivity-aware design
  • Strong understanding of Calibre verification (DRC, LVS) and troubleshooting techniques
  • Experience with custom cell-based layout and top-level floor planning, with work on focal-plane arrays a plus
  • Technical knowledge of wire resistance, coupling capacitance, and best practices for minimizing parasitic effects
  • Excellent communication skills and the ability to work effectively within a multidisciplinary team
  • Programming/scripting skills in SKILL, TCL, Shell, or Python

Salary Range:
$113,600.00-$151,400.000
Pay Transparency
The anticipated salary range listed for this role is only an estimate. Actual compensation for successful candidates is carefully determined based on several factors including, but not limited to, location, local regulations (such as minimum wage), education/training, work experience, key skills, and type of position.
Teledyne and all of our employees are committed to conducting business with the highest ethical standards. We require all employees to comply with all applicable laws, regulations, rules and regulatory orders. Our reputation for honesty, integrity and high ethics is as important to us as our reputation for making innovative sensing solutions.
Teledyne is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status, age, or any other characteristic or non-merit based factor made unlawful by federal, state, or local laws.

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