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Asic Layout Design Engineer Jobs (NOW HIRING)

Innogrit

Design Engineer

San Jose, CA · On-site

Perform post-layout Hspice simulation to characterize the designed circuit. * Assist with test ... Masters degree in Electrical Engineering/Computer Science. * 6 months experience as an ASIC Design ...

Superbeo

Analog Layout Design Engineer

Santa Clara, CA · On-site

$237.20K/yr

Analog Layout Design Engineer Job location: Santa Clara, CA, 95054 Job Duration: 3 Months, Contract to Hire * Experience with layout of cutting-edge high-performance, high-speed CMOS integrated ...

Apple

Digital Layout Design Engineer

Austin, TX

$134.80K - $245.80K/yr

... design team to plan, schedule work and negotiate layout tradeoffs as needed. - Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts. - Exceed engineering ...

Apple

Digital Layout Design Engineer

Austin, TX

$134.80K - $245.80K/yr

... design team to plan, schedule work and negotiate layout tradeoffs as needed. - Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts. - Exceed engineering ...

Apple

Digital Layout Design Engineer

Austin, TX · On-site

$134.80K - $245.80K/yr

... design team to plan, schedule work and negotiate layout tradeoffs as needed. - Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts. - Exceed engineering ...

Apple

Digital Layout Design Engineer

Austin, TX

$134.80K - $245.80K/yr

... design team to plan, schedule work and negotiate layout tradeoffs as needed. - Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts. - Exceed engineering ...

GABLETEK

AMR Layout Design Engineer

Troy, MI · On-site

As an AMR Layout Design Engineer will be responsible for the engineering design and deployment of AMR systems at customer facilities, validating and ensuring the systems as installed are safe and in ...

GABLETEK

AMR Layout Design Engineer

Troy, MI · On-site

As an AMR Layout Design Engineer will be responsible for the engineering design and deployment of AMR systems at customer facilities, validating and ensuring the systems as installed are safe and in ...

Fermilab

Jr. ASIC Design Engineer

Batavia, NY · Hybrid

$70.80K - $93.20K/yr

We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and ... Designing circuit networks using schematic entry and layout tools with full custom or timing-driven ...

Nvidia

OR

You'll work cross functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products. * Take part in floor planning, custom layout and verifying against design ...

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Asic Layout Design Engineer information

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$45K

$120.8K

$185.5K

How much do asic layout design engineer jobs pay per year?

As of Jun 1, 2026, the average yearly pay for asic layout design engineer in the United States is $120,849.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,000.00 and $144,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an ASIC Layout Design Engineer, and why are they important?

To thrive as an ASIC Layout Design Engineer, you need expertise in semiconductor physics, VLSI design, and layout methodologies, typically supported by a degree in electrical engineering or a related field. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, and knowledge of process design kits (PDKs) are routinely required. Attention to detail, strong problem-solving abilities, and effective collaboration skills help engineers excel in this role. These skills are crucial for ensuring accurate, efficient, and manufacturable chip designs that meet performance and reliability standards.

What are some common challenges faced by ASIC Layout Design Engineers in managing complex projects?

ASIC Layout Design Engineers often face challenges such as meeting tight design schedules, ensuring design rule compliance, and minimizing layout-induced circuit issues like parasitics and crosstalk. Balancing these technical demands with iterative feedback from verification and design teams requires effective communication and strong problem-solving skills. Additionally, staying updated with evolving EDA tools and process technologies is essential for delivering high-quality layouts within project constraints.

What are ASIC Layout Design Engineers?

ASIC Layout Design Engineers are specialized professionals who create the physical design of Application-Specific Integrated Circuits (ASICs). They translate circuit schematics into geometric representations that can be fabricated onto silicon chips, ensuring performance, power, and area specifications are met. Their work involves using electronic design automation (EDA) tools to place and route circuit elements while adhering to manufacturing constraints and design rules. They collaborate closely with circuit designers and verification engineers throughout the chip design process.

What is the difference between Asic Layout Design Engineer vs Digital IC Design Engineer?

AspectAsic Layout Design EngineerDigital IC Design Engineer
Primary FocusPhysical layout and placement of ASIC componentsLogical design and architecture of digital circuits
Skills RequiredEDA tools, layout optimization, fabrication process knowledgeHDL coding, simulation, digital logic design
Work EnvironmentASIC design teams, fabrication facilitiesDesign houses, semiconductor companies
CertificationsTypically none specific, but familiarity with industry standardsHDL certifications, digital design courses

While both roles are integral to ASIC development, the Asic Layout Design Engineer focuses on the physical implementation of circuits, ensuring manufacturability and performance. In contrast, the Digital IC Design Engineer concentrates on the logical design and verification of digital circuits. Both roles require knowledge of digital design principles, but their daily tasks and skill sets differ significantly.

More about Asic Layout Design Engineer jobs
What states have the most Asic Layout Design Engineer jobs? States with the most job openings for Asic Layout Design Engineer jobs include:
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Asic Layout Design Engineer jobs near you
Infographic showing various Asic Layout Design Engineer job openings in the United States as of May 2026, with employment types broken down into 80% Full Time, 8% Part Time, and 12% Contract. Highlights an 86% Physical, 9% Hybrid, and 5% Remote job distribution, with an average salary of $120,849 per year, or $58.1 per hour.
Design Engineer

Design Engineer

Innogrit

San Jose, CA • On-site

Full-time

Posted 29 days ago

Job description

Salary: DOE

Job description

  • Contribute to micro-architecture designs for state-of-the-art high-speed low-power digital IPs.
  • Implement design modules using hardware description language (HDL).
  • Design schemes for multi-clock domain crossing and synchronization.
  • Drive OVM/UVM design verification and support FPGA engineers for early prototyping.
  • Execute RTL-to-GDS development flow, including synthesis, schematics design, and supervising custom layout.
  • Check timing closure, and analyze the performance/power/area of designed IPs.
  • Support IP integration to SoC, including soft-IP RTL integration and hard-IP GDS macro integration.
  • Perform post-layout Hspice simulation to characterize the designed circuit.
  • Assist with test program development, chip bring-up, validation, and production maturity.


Job requirement

  • Masters degree in Electrical Engineering/Computer Science.
  • 6 months experience as an ASIC Design Engineer or Verification Design Engineer.
  • Proficient with Verilog, SystemVerilog, and Python or Perl.
  • Strong knowledge of micro-architecture design, function modeling, RTL coding, and SoC Integration.
  • Good at multi-clock domain designs, timing analysis, and optimization.
  • Experience in SystemVerilog OVM/UVM, synthesis, mixed-signal circuit schematics design, and layout design.
  • Able to proactively take on responsibilities and competent to work in a start-up environment.


About Innogrit Corporation

  • Innogrit is transforming data storage with its advanced PCIe Gen 3 and Gen 4 SSD (Solid State Drive) Processors. By delivering unprecedented reliability, performance, and energy efficiency, SSDs based on Innogrits technology unleash the full potential for next generation SSDs using the latest NAND flash memory.