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Asic Layout Design Engineer Jobs (NOW HIRING)

... Image Sensor such as asic_pixel array, column-amplifier, switch capacitor, comparator, ramp ... Collaborate with layout engineer on whole chip layout integration and improvement by Cadence ...

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

... Image Sensor such as asic_pixel array, column-amplifier, switch capacitor, comparator, ramp ... Collaborate with layout engineer on whole chip layout integration and improvement by Cadence ...

Jr. ASIC Design Engineer

Batavia, IL · On-site

$70K - $93K/yr

We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and ... Designing circuit networks using schematic entry and layout tools with full custom or timing-driven ...

Senior Mask Design Engineer

Santa Clara, CA · Hybrid

$122K - $164K/yr

You'll work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products. * Job duties will include floor planning, custom layout and verifying against design rules and ...

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Asic Layout Design Engineer information

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$45K

$120.8K

$185.5K

How much do asic layout design engineer jobs pay per year?

As of Jun 22, 2026, the average yearly pay for asic layout design engineer in the United States is $120,849.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,000.00 and $144,000.00 per year, depending on experience, location, and employer.

What are ASIC Layout Design Engineers?

ASIC Layout Design Engineers are specialized professionals who create the physical design of Application-Specific Integrated Circuits (ASICs). They translate circuit schematics into geometric representations that can be fabricated onto silicon chips, ensuring performance, power, and area specifications are met. Their work involves using electronic design automation (EDA) tools to place and route circuit elements while adhering to manufacturing constraints and design rules. They collaborate closely with circuit designers and verification engineers throughout the chip design process.

What are the key skills and qualifications needed to thrive as an ASIC Layout Design Engineer, and why are they important?

To thrive as an ASIC Layout Design Engineer, you need expertise in semiconductor physics, VLSI design, and layout methodologies, typically supported by a degree in electrical engineering or a related field. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, and knowledge of process design kits (PDKs) are routinely required. Attention to detail, strong problem-solving abilities, and effective collaboration skills help engineers excel in this role. These skills are crucial for ensuring accurate, efficient, and manufacturable chip designs that meet performance and reliability standards.

What are some common challenges faced by ASIC Layout Design Engineers in managing complex projects?

ASIC Layout Design Engineers often face challenges such as meeting tight design schedules, ensuring design rule compliance, and minimizing layout-induced circuit issues like parasitics and crosstalk. Balancing these technical demands with iterative feedback from verification and design teams requires effective communication and strong problem-solving skills. Additionally, staying updated with evolving EDA tools and process technologies is essential for delivering high-quality layouts within project constraints.

What is the difference between Asic Layout Design Engineer vs Digital IC Design Engineer?

AspectAsic Layout Design EngineerDigital IC Design Engineer
Primary FocusPhysical layout and placement of ASIC componentsLogical design and architecture of digital circuits
Skills RequiredEDA tools, layout optimization, fabrication process knowledgeHDL coding, simulation, digital logic design
Work EnvironmentASIC design teams, fabrication facilitiesDesign houses, semiconductor companies
CertificationsTypically none specific, but familiarity with industry standardsHDL certifications, digital design courses

While both roles are integral to ASIC development, the Asic Layout Design Engineer focuses on the physical implementation of circuits, ensuring manufacturability and performance. In contrast, the Digital IC Design Engineer concentrates on the logical design and verification of digital circuits. Both roles require knowledge of digital design principles, but their daily tasks and skill sets differ significantly.

More about Asic Layout Design Engineer jobs
What states have the most Asic Layout Design Engineer jobs? States with the most job openings for Asic Layout Design Engineer jobs include:

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Job description

ASIC Design Engineer(Remote)
MUST HAVE: AEROSPACE , DEEP UNDERSTANDING ASIC, DO254, DIGITAL CIRCUITS
Position Overview:
We are looking for an experienced ASIC Design Engineer with a strong background in the design, verification, and implementation of Application-Specific Integrated Circuits (ASICs) for aerospace applications. The ideal candidate will have extensive experience working on high-reliability, high-performance digital circuits, and a deep understanding of ASIC design processes, in consideration of DO254.
  1. Key Responsibilities:
  • ASIC Design and Development: Design and develop high-performance, low-power, and highly reliable ASICs for aerospace systems, ensuring compliance with stringent aerospace industry standards like DO254 .
  • System-Level Design Integration: Work closely with system engineers to ensure seamless integration of ASICs into larger aerospace systems, including payloads, communications, and avionics systems.
  • Verification and Testing: Conduct thorough verification and validation of ASIC designs, including functional verification, timing analysis, and design for testability (DFT). Perform failure analysis and debug of complex ASIC designs.
  • RTL Design & Simulation: Write RTL (Register Transfer Level) code in Verilog or VHDL, and perform simulations using industry-standard tools like ModelSim, Cadence, or Synopsys.
  • Design for Reliability: Focus on designing for high-reliability and radiation tolerance,
  • Cross-Functional Collaboration: Collaborate with cross-functional teams like = hardware engineers, software engineers, and test engineers.
  1. Qualifications & Skills:
  • Education: Bachelor's, Master's, or PhD degree in Electrical Engineering, Computer Engineering, or a related field.
  • Experience:
    • Minimum of 5-8 years of hands-on experience in ASIC design for aerospace, defense.
    • Proven expertise in designing ASICs that meet high-reliability standards, such as MIL-STD-883, DO-254, or other aerospace-specific certifications.
    • Solid understanding of digital design, RTL coding (Verilog/VHDL), and ASIC flow (synthesis, place & route, timing analysis).
    • Experience with ASIC verification techniques (e.g., functional verification, simulation, emulation, DFT).
    • Knowledge of radiation-hardened (Rad-Hard) or radiation-tolerant ASIC design principles is a plus.
  • Technical Skills:
    • Expertise in Verilog/ VHDL and experience with ASIC synthesis tools like Cadence Genus, Synopsys Design Compiler.
    • Experience with simulation tools such as ModelSim, VCS, or Xilinx Vivado.
    • Familiarity with timing analysis, power optimization, and signal integrity.
    • Experience in FPGA/ASIC hybrid systems and custom digital logic development.
    • Knowledge of PCB design principles and experience working with high-speed boards is a plus.
  • Soft Skills:
    • Excellent problem-solving and analytical skills, with the ability to troubleshoot complex system-level issues.
    • Strong communication skills to interact with cross-functional teams, including engineers, management, and customers.
    • Ability to work independently with minimal supervision, while also collaborating in a team-oriented environment.
    • Detail-oriented and committed to maintaining high standards of quality, safety, and reliability.
  1. Preferred Previous Experience:
  • Experience with space-based electronics or aerospace communications.
  • Familiarity with ISO 9001, AS9100, or similar quality standards in aerospace.
  • Background in radiation effects on electronics or space environmental testing.
  • Familiarity with FPGA-based ASIC prototyping for aerospace applications.