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Asic Engineering Jobs in California (NOW HIRING)

Senior Custom ASIC Engineering Lead

San Jose, CA

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Our ASIC Products Division is looking for a senior engineer to guide customer teams designing challenging chips in areas such as AI, HPC, networking and storage. This is an immensely responsible ...

Senior Custom ASIC Engineering Lead

Irvine, CA

$143K - $230K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Our ASIC Products Division is looking for a senior engineer to guide customer teams designing challenging chips in areas such as AI, HPC, networking and storage. This is an immensely responsible ...

Senior Custom ASIC Engineering Lead

San Jose, CA · On-site

$143K - $230K/yr

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Our ASIC Products Division is looking for a senior engineer to guide customer teams designing challenging chips in areas such as AI, HPC, networking and storage. This is an immensely responsible ...

Meta's Silicon Engineering organization is building custom silicon solutions that power the infrastructure underpinning Meta's AI and data center workloads at scale. As an ASIC Engineer specializing ...

ASIC Engineering Technical Leader - Emulation

San Jose, CA

$186K - $267K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Lead the planning and execution of ASIC verification for complex networking SoCs, ensuring high ... Provide technical leadership and mentorship to verification engineers, promoting best practices and ...

Meta's Silicon Engineering organization is building custom silicon solutions that power the infrastructure underpinning Meta's AI and data center workloads at scale. As an ASIC Engineer specializing ...

Sr. ASIC Design Engineer

San Jose, CA · On-site

$168 - $336/hr

  • Medical

  • Dental

  • Vision

  • PTO

Sr. ASIC Design Engineer Micron Technology is a world leader in innovating memory and storage ... Bachelor's degree in Electrical Engineering or Computer Science related major. * Hands‑on ...

ASIC Engineer, Power

Sunnyvale, CA · On-site +1

$146K/yr

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience * 6+ years of experience in ASIC design or physical design with a focus on ...

Meta's Silicon Engineering organization is building custom silicon solutions that power the infrastructure underpinning Meta's AI and data center workloads at scale. As an ASIC Engineer specializing ...

Sr. Engineer, ASIC Design

San Jose, CA · On-site

$160 - $192/hr

... Engineering, Computer Engineering, or related fields * 1+ years of work or academic experience in ASIC design * History of assuming responsibility for a variety of technical tasks and completing ...

ASIC Engineer 5, 5219

Folsom, CA · On-site

$98.12 - $107.21/hr

ASIC Engineer 5 Duties: * Oversees definition, design, verification, and documentation for ASIC development. * Determines architecture design, logic design, and system simulation. * Defines module ...

Reporting to the Senior Director, ASIC Engineering, you will manage a team and oversee the end-to-end design and development of high-performance ASICs, ensuring technical excellence, on-time project ...

Meta is hiring ASIC EDA Infrastructure Engineers within our Infrastructure ASIC organization. We ... Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or ...

Sr. Engineer, ASIC Design

San Jose, CA · On-site

$160K - $192K/yr

Engineer, ASIC Design Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by ... MS in Electrical Engineering, Computer Engineering, or related fields * Proficient in writing ...

Showing results 21-40

Asic Engineering information

What is the difference between Asic Engineering vs FPGA Design?

AspectAsic EngineeringFPGA Design
Required CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; often certifications in ASIC designBachelor's or Master's in Electrical Engineering, Digital Design, or related fields; certifications less common
Work EnvironmentDesigning custom chips in semiconductor labs or design houses; involves hardware and software integrationDeveloping programmable logic designs in labs or FPGA development environments; focuses on reconfigurable hardware
Industry UsageUsed in high-volume consumer electronics, telecom, and automotive industries for custom chip solutionsCommon in prototyping, testing, and specialized applications across various industries

Asic Engineering and FPGA Design share foundational knowledge in digital logic and hardware description languages. However, Asic Engineers focus on designing permanent, high-volume chips, while FPGA Designers work with reconfigurable hardware for testing and specialized tasks. Both roles require similar educational backgrounds but differ in application and design processes.

What job categories do people searching Asic Engineering jobs in California look for?

The top searched job categories for Asic Engineering jobs in California are:

What cities in California are hiring for Asic Engineering jobs?

Cities in California with the most Asic Engineering job openings:

Senior Custom ASIC Engineering Lead

Broadcom

San Jose, CA

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 9 days ago


Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

19th of 157 rated electronics manufacturers


Job description

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Job Description:

Are you a versatile, senior engineer capable of leading external and internal cross-functional teams in areas such as physical design, STA, DFT, and packaging? Have you taped out so many chips that you can identify potential design problems hidden in EDA reports, advise design teams on how to fix them, and then publish an application note about avoiding them in future? Do you love technical-deep-dive with engineers and providing an eagle's eye summary to management? If this is your engineering profile and you are looking for a challenge, then we have one for you.

Broadcom develops critical Infrastructure chips that enable a variety of Customers to produce ASICs in almost all major segments of the Semiconductor industry, including AI. Our ASIC Products Division is looking for a senior engineer to guide customer teams designing challenging chips in areas such as AI, HPC, networking and storage. This is an immensely responsible position, and an opportunity to push the frontiers of technology by working with cross-functional teams inside and outside of Broadcom.

As a valued member of this team, you will be required to do the following:

  • Manage external customer ASIC programs from inception to finish, including RFQs, technology and IP collaterals, design, test, packaging, fabrication, bring-up and production

  • Advise customers on best practices in EDA, flows and design methodologies, and by organizing Q&A sessions with Broadcom technology experts

  • See ahead, plan ahead, work ahead. Proactively assess potential risks to the design quality and project schedule, then work with cross-functional teams to prepare and execute risk mitigation actions

  • Execute physical design flows to check that incoming customer tape-in netlists meet Broadcom's stringent tape-out quality standards

  • Motivate and drive yourself to stay abreast of developments in Broadcom IPs, technology and end user applications

  • Participate in discussions about your chips with marketing, sales, legal and regulatory compliance teams

  • Be a consummate team player and assist other teams in need

You must have these proven skills to qualify for this position:

  • Multiple tape-outs in advanced technology nodes

  • Analyze PPA tradeoffs involved amongst various library components, and architectures

  • Knowledgeable in low power design and power management

  • Hands-on experience in physical design and STA, EDA tools, design flows for physical design, logic simulation, test, and packaging

  • Programming in TCL, shell and scripting languages

The following skills are nice to have:

  • Exposure to SERDES communications protocols.

  • Logic design, chip architecture, microarchitecture, Verilog RTL coding Front-end logic design verification, DRC, logic synthesis

  • Knowledge of DFT methods including scan, memory BIST and repair

Education and Experience Requirements:

  • Bachelors degree and 12+ years of related experience; or Masters degree and 10+ years of related experience


Compensation and Benefits


The annual base salary range for this position is USD 143,800.00 To USD 230,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.


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