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Asic Development Engineer Jobs in California (NOW HIRING)

Meta

ASIC Engineer, Design Verification

Sunnyvale, CA · On-site +1

$146K/yr

As a Design Verification Engineer, you will be part of an agile team working with experienced ... Track record of 'first-pass success' in ASIC development cycles * Experience with micro ...

Meta

ASIC Engineer, EDA Infrastructure

Sunnyvale, CA

$114K/yr

ASIC Engineer, EDA Infrastructure Responsibilities: * Front End implementation flow development and ... Internal tools development and automation to help improve productivity across ASIC design cycles ...

Axiado

ASIC Verification Engineer

San Jose, CA · On-site

Support test program development, chip validation, and chip life until production maturity. * Team ... of ASIC development. Qualifications * 8+ years of experience in UVM verification and UVM ...

Axiado

ASIC Verification Engineer

San Jose, CA

Support test program development, chip validation, and chip life until production maturity. * Team ... of ASIC development. Qualifications * 8+ years of experience in UVM verification and UVM ...

Cisco

Software Engineer (simulation)

San Jose, CA · On-site

$152K - $219K/yr

Work under the guidance of senior engineers to help implement and maintain components of the ... Possess both Software development and ASIC development experience Why Cisco? At Cisco, we're ...

Boeing

Principal ASIC Engineer

El Segundo, CA · On-site

Principal ASIC Engineer Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems ... Our diverse development portfolio provides opportunities to learn with exposure to the breadth of ...

Nvidia

Manager, ASIC Chip - GPU

Santa Clara, CA

Join NVIDIA's powerful GPU ASIC team and drive the innovation of future GPU processors for AI ... development, and VLSI teams. * Collaborate with packaging, system design, DFT, test engineering ...

Boeing

Principal ASIC Engineer

El Segundo, CA · On-site

Principal ASIC Engineer Company: The Boeing Company Boeing Space, Intelligence & Weapons Systems ... Our diverse development portfolio provides opportunities to learn with exposure to the breadth of ...

Cisco

Software Engineer (simulation)

San Jose, CA · On-site

$152K - $219K/yr

Work under the guidance of senior engineers to help implement and maintain components of the ... Possess both Software development and ASIC development experience Why Cisco? At Cisco, we're ...

Meta

ASIC Engineer, EDA Infrastructure

Menlo Park, CA

$114K/yr

ASIC Engineer, EDA Infrastructure Responsibilities: * Front End implementation flow development and ... Internal tools development and automation to help improve productivity across ASIC design cycles ...

Broadcom

R&D Engineer IC Design 5

San Jose, CA · On-site

This individual will be a key member of the ASIC system-level verification team. Responsibilities ... Education: Bachelor's in Engineering * Methodologies & Languages: Strong working knowledge of ...

Conductor

ASIC Design Engineer

San Francisco, CA · On-site

$130 - $210/hr

We're looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer. Ideal ...

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Asic Development Engineer information

What is the difference between Asic Development Engineer vs FPGA Design Engineer?

AspectAsic Development EngineerFPGA Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; knowledge of ASIC design toolsBachelor's or Master's in Electrical Engineering, Digital Design; familiarity with FPGA development tools
Work EnvironmentDesigning and verifying custom silicon chips in semiconductor labs or R&D centersDeveloping and testing FPGA-based solutions in hardware labs or embedded systems environments
Industry UsageUsed in semiconductor companies, integrated circuit design firms, and tech giantsCommon in telecommunications, aerospace, and embedded systems industries

While both roles involve digital hardware design, Asic Development Engineers focus on creating custom chips for high-performance applications, whereas FPGA Design Engineers work on programmable hardware solutions. Both require strong digital design skills and familiarity with hardware description languages, but their end products and development environments differ.

What does an ASIC Development Engineer do?

An ASIC Development Engineer designs, develops, and tests application-specific integrated circuits (ASICs) used in electronic devices. They work with hardware description languages like VHDL or Verilog, collaborate with cross-functional teams, and use simulation tools to ensure performance and reliability throughout the development process.

Are ASIC Development Engineers in demand?

ASIC Development Engineers are in high demand due to the growing need for custom hardware solutions in industries like telecommunications, consumer electronics, and automotive. Skills in hardware description languages such as VHDL or Verilog, along with experience in FPGA and ASIC design, increase employability in this specialized field.
What are popular job titles related to Asic Development Engineer jobs in California? For Asic Development Engineer jobs in California, the most frequently searched job titles are:
What job categories do people searching Asic Development Engineer jobs in California look for? The top searched job categories for Asic Development Engineer jobs in California are:
What cities in California are hiring for Asic Development Engineer jobs? Cities in California with the most Asic Development Engineer job openings:
Asic Development Engineer jobs near you

ASIC Engineer, Design Verification

Meta

Sunnyvale, CA • On-site, Remote

$146K/yr

Full-time

Re-posted 9 days ago

Meta rating

7.8

Company rating: 7.8 out of 10

Based on 45 frontline employees who took The Breakroom Quiz

136th of 242 rated software companies

Job description

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of an agile team working with experienced engineers across the industry, focused on developing ASIC solutions for Meta’s data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, you will use other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.
ASIC Engineer, Design Verification Responsibilities:
  • Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification
  • Develop functional tests based on verification test plan
  • Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
  • Debug, root-cause and resolve functional failures in the design, partnering with the Design team
  • Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring design quality meets defined verification and coverage goals
  • Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry

Minimum Qualifications:
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 6+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification
  • 6+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
  • Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments

Preferred Qualifications:
  • Experience working across and building relationships with cross-functional design, model and emulation teams
  • Experience with revision control systems like Mercurial(Hg), Git or SVN
  • Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle
  • Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs
  • Track record of 'first-pass success' in ASIC development cycles
  • Experience with micro-architectural performance verification
  • Experience verifying GPU/CPU designs
  • Experience with verification of ARM/RISC-V based sub-systems or SoCs
  • Experience in development of UVM based verification environments from scratch
  • Experience with IP or integration verification of high-speed interfaces like PCIe, RoCE, DDR, HBM, Ethernet
  • Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$146,000/year to $209,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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